From: "H.J. Lu" <hjl.tools@gmail.com>
To: "Cui, Lili" <lili.cui@intel.com>
Cc: binutils@sourceware.org, jbeulich@suse.com, "Mo,
Zewei" <zewei.mo@intel.com>
Subject: Re: [PATCH V5 6/9] Support APX Push2/Pop2
Date: Wed, 27 Dec 2023 17:55:41 -0800 [thread overview]
Message-ID: <ZYzVnagzyEldw3rP@gmail.com> (raw)
In-Reply-To: <20231228012714.2989658-7-lili.cui@intel.com>
On Thu, Dec 28, 2023 at 01:27:11AM +0000, Cui, Lili wrote:
> From: "Mo, Zewei" <zewei.mo@intel.com>
>
> PPX functionality for PUSH/POP is not implemented in this patch
> and will be implemented separately.
>
> gas/ChangeLog:
>
> 2023-12-28 Zewei Mo <zewei.mo@intel.com>
> H.J. Lu <hongjiu.lu@intel.com>
> Lili Cui <lili.cui@intel.com>
>
> * config/tc-i386.c: (enum i386_error):
> New unsupported_rsp_register and invalid_src_register_set.
> (md_assemble): Add handler for unsupported_rsp_register and
> invalid_src_register_set.
> (check_APX_operands): Add invalid check for push2/pop2.
> (match_template): Handle check_APX_operands.
> * testsuite/gas/i386/i386.exp: Add apx-push2pop2 tests.
> * testsuite/gas/i386/x86-64.exp: Ditto.
> * testsuite/gas/i386/x86-64-apx-push2pop2.d: New test.
> * testsuite/gas/i386/x86-64-apx-push2pop2.s: Ditto.
> * testsuite/gas/i386/x86-64-apx-push2pop2-intel.d: Ditto.
> * testsuite/gas/i386/x86-64-apx-push2pop2-inval.l: Ditto.
> * testsuite/gas/i386/x86-64-apx-push2pop2-inval.s: Ditto.
> * testsuite/gas/i386/apx-push2pop2-inval.s: Ditto.
> * testsuite/gas/i386/apx-push2pop2-inval.d: Ditto.
> * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Added bad
> testcases for POP2.
> * testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
>
> opcodes/ChangeLog:
>
> * i386-dis-evex-reg.h: Add REG_EVEX_MAP4_8F.
> * i386-dis-evex-w.h: Add EVEX_W_MAP4_8F_R_0 and EVEX_W_MAP4_FF_R_6
> * i386-dis-evex.h: Add REG_EVEX_MAP4_8F.
> * i386-dis.c (PUSH2_POP2_Fixup): Add special handling for PUSH2/POP2.
> (get_valid_dis386): Add handler for vector length and address_mode for
> APX-Push2/Pop2 insn.
> (nd): define nd as b for EVEX-promoted instrutions.
> (OP_VEX): Add handler of 64-bit vvvv register for APX-Push2/Pop2 insn.
> * i386-gen.c: Add Push2Pop2 bitfield.
> * i386-opc.h: Regenerated.
> * i386-opc.tbl: Regenerated.
> ---
> gas/config/tc-i386.c | 44 +++++++++++++++++++
> gas/testsuite/gas/i386/apx-push2pop2-inval.l | 5 +++
> gas/testsuite/gas/i386/apx-push2pop2-inval.s | 9 ++++
> gas/testsuite/gas/i386/i386.exp | 1 +
> .../gas/i386/x86-64-apx-evex-promoted-bad.d | 5 +++
> .../gas/i386/x86-64-apx-evex-promoted-bad.s | 7 +++
> .../gas/i386/x86-64-apx-push2pop2-intel.d | 42 ++++++++++++++++++
> .../gas/i386/x86-64-apx-push2pop2-inval.l | 13 ++++++
> .../gas/i386/x86-64-apx-push2pop2-inval.s | 17 +++++++
> gas/testsuite/gas/i386/x86-64-apx-push2pop2.d | 42 ++++++++++++++++++
> gas/testsuite/gas/i386/x86-64-apx-push2pop2.s | 39 ++++++++++++++++
> gas/testsuite/gas/i386/x86-64.exp | 3 ++
> opcodes/i386-dis-evex-reg.h | 9 ++++
> opcodes/i386-dis-evex-w.h | 10 +++++
> opcodes/i386-dis-evex.h | 2 +-
> opcodes/i386-dis.c | 31 +++++++++++++
> opcodes/i386-opc.tbl | 9 ++++
> 17 files changed, 287 insertions(+), 1 deletion(-)
> create mode 100644 gas/testsuite/gas/i386/apx-push2pop2-inval.l
> create mode 100644 gas/testsuite/gas/i386/apx-push2pop2-inval.s
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-push2pop2-intel.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.l
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.s
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-push2pop2.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-push2pop2.s
>
> diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
> index 99b484122e1..8af98e435ef 100644
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -250,6 +250,7 @@ enum i386_error
> invalid_vector_register_set,
> invalid_tmm_register_set,
> invalid_dest_and_src_register_set,
> + invalid_dest_register_set,
> invalid_pseudo_prefix,
> unsupported_vector_index_register,
> unsupported_broadcast,
> @@ -259,6 +260,7 @@ enum i386_error
> no_default_mask,
> unsupported_rc_sae,
> unsupported_vector_size,
> + unsupported_rsp_register,
> internal_error,
> };
>
> @@ -5510,6 +5512,9 @@ md_assemble (char *line)
> case invalid_dest_and_src_register_set:
> err_msg = _("destination and source registers must be distinct");
> break;
> + case invalid_dest_register_set:
> + err_msg = _("two dest registers must be distinct");
> + break;
> case invalid_pseudo_prefix:
> err_msg = _("rex2 pseudo prefix cannot be used");
> break;
> @@ -5538,6 +5543,9 @@ md_assemble (char *line)
> as_bad (_("vector size above %u required for `%s'"), 128u << vector_size,
> pass1_mnem ? pass1_mnem : insn_name (current_templates.start));
> return;
> + case unsupported_rsp_register:
> + err_msg = _("'rsp' register cannot be used");
> + break;
> case internal_error:
> err_msg = _("internal error");
> break;
> @@ -7174,6 +7182,35 @@ check_EgprOperands (const insn_template *t)
> return 0;
> }
>
> +/* Check if APX operands are valid for the instruction. */
> +static bool
> +check_APX_operands (const insn_template *t)
> +{
> + /* Push2* and Pop2* cannot use RSP and Pop2* cannot pop two same registers.
> + */
> + switch (t->mnem_off)
> + {
> + case MN_pop2:
> + case MN_pop2p:
> + if (register_number (i.op[0].regs) == register_number (i.op[1].regs))
> + {
> + i.error = invalid_dest_register_set;
> + return 1;
> + }
> + /* fall through */
> + case MN_push2:
> + case MN_push2p:
> + if (register_number (i.op[0].regs) == 4
> + || register_number (i.op[1].regs) == 4)
> + {
> + i.error = unsupported_rsp_register;
> + return 1;
> + }
> + break;
> + }
> + return 0;
> +}
> +
> /* Helper function for the progress() macro in match_template(). */
> static INLINE enum i386_error progress (enum i386_error new,
> enum i386_error last,
> @@ -7674,6 +7711,13 @@ match_template (char mnem_suffix)
> continue;
> }
>
> + /* Check if APX operands are valid. */
> + if (check_APX_operands (t))
> + {
> + specific_error = progress (i.error);
> + continue;
> + }
> +
> /* Check whether to use the shorter VEX encoding for certain insns where
> the EVEX encoding comes first in the table. This requires the respective
> AVX-* feature to be explicitly enabled.
> diff --git a/gas/testsuite/gas/i386/apx-push2pop2-inval.l b/gas/testsuite/gas/i386/apx-push2pop2-inval.l
> new file mode 100644
> index 00000000000..a55a71520c8
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/apx-push2pop2-inval.l
> @@ -0,0 +1,5 @@
> +.* Assembler messages:
> +.*:6: Error: `push2' is only supported in 64-bit mode
> +.*:7: Error: `push2p' is only supported in 64-bit mode
> +.*:8: Error: `pop2' is only supported in 64-bit mode
> +.*:9: Error: `pop2p' is only supported in 64-bit mode
> diff --git a/gas/testsuite/gas/i386/apx-push2pop2-inval.s b/gas/testsuite/gas/i386/apx-push2pop2-inval.s
> new file mode 100644
> index 00000000000..77166327ed1
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/apx-push2pop2-inval.s
> @@ -0,0 +1,9 @@
> +# Check 32bit APX-PUSH2/POP2 instructions
> +
> + .allow_index_reg
> + .text
> +_start:
> + push2 %rax, %rbx
> + push2p %rax, %rbx
> + pop2 %rax, %rbx
> + pop2p %rax, %rbx
> diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
> index 3917be6be70..f9ee85b4bb3 100644
> --- a/gas/testsuite/gas/i386/i386.exp
> +++ b/gas/testsuite/gas/i386/i386.exp
> @@ -511,6 +511,7 @@ if [gas_32_check] then {
> run_dump_test "sm4-intel"
> run_list_test "pbndkb-inval"
> run_list_test "user_msr-inval"
> + run_list_test "apx-push2pop2-inval"
> run_list_test "sg"
> run_dump_test "clzero"
> run_dump_test "invlpgb"
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
> index ba14736c3a8..3bfb5dec202 100644
> --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
> +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
> @@ -34,3 +34,8 @@ Disassembly of section .text:
> [ ]*[a-f0-9]+:[ ]+62 f4 e4[ ]+\(bad\)
> [ ]*[a-f0-9]+:[ ]+08 ff[ ]+.*
> [ ]*[a-f0-9]+:[ ]+04 08[ ]+.*
> +[ ]*[a-f0-9]+:[ ]+62 f4 3c[ ]+\(bad\)
> +[ ]*[a-f0-9]+:[ ]+08 8f c0 ff ff ff[ ]+or.*
> +[ ]*[a-f0-9]+:[ ]+62 74 7c 18 8f c0[ ]+pop2 %rax,\(bad\)
> +[ ]*[a-f0-9]+:[ ]+62 d4 3c 18 8f[ ]+\(bad\)
> +[ ]*[a-f0-9]+:[ ]+c0[ ]+.*
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
> index fcbb1b93659..fde6736e9b2 100644
> --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
> +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
> @@ -40,3 +40,10 @@ _start:
>
> #{evex} inc %rax %rbx EVEX.vvvv != 1111 && EVEX.ND = 0.
> .insn EVEX.L0.NP.M4.W1 0xff/0, (%rax,%rcx), %rbx
> + # pop2 %rax, %r8 set EVEX.ND=0.
> + .insn EVEX.L0.M4.W0 0x8f/0, %rax, %r8
> + .byte 0xff, 0xff, 0xff
> + # pop2 %rax, %r8 set EVEX.vvvv = 1111.
> + .insn EVEX.L0.M4.W0 0x8f, %rax, {rn-sae},%r8
> + # pop2 %r8, %r8.
> + .insn EVEX.L0.M4.W0 0x8f/0, %r8,{rn-sae}, %r8
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-push2pop2-intel.d b/gas/testsuite/gas/i386/x86-64-apx-push2pop2-intel.d
> new file mode 100644
> index 00000000000..46b21219582
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-push2pop2-intel.d
> @@ -0,0 +1,42 @@
> +#as: --64
> +#objdump: -dw -Mintel
> +#name: i386 APX-push2pop2 insns (Intel disassembly)
> +#source: x86-64-apx-push2pop2.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*62 f4 7c 18 ff f3\s+push2\s+rax,rbx
> +\s*[a-f0-9]+:\s*62 fc 3c 18 ff f1\s+push2\s+r8,r17
> +\s*[a-f0-9]+:\s*62 d4 04 10 ff f1\s+push2\s+r31,r9
> +\s*[a-f0-9]+:\s*62 dc 3c 10 ff f7\s+push2\s+r24,r31
> +\s*[a-f0-9]+:\s*62 f4 fc 18 ff f3\s+push2p\s+rax,rbx
> +\s*[a-f0-9]+:\s*62 fc bc 18 ff f1\s+push2p\s+r8,r17
> +\s*[a-f0-9]+:\s*62 d4 84 10 ff f1\s+push2p\s+r31,r9
> +\s*[a-f0-9]+:\s*62 dc bc 10 ff f7\s+push2p\s+r24,r31
> +\s*[a-f0-9]+:\s*62 f4 64 18 8f c0\s+pop2\s+rbx,rax
> +\s*[a-f0-9]+:\s*62 d4 74 10 8f c0\s+pop2\s+r17,r8
> +\s*[a-f0-9]+:\s*62 dc 34 18 8f c7\s+pop2\s+r9,r31
> +\s*[a-f0-9]+:\s*62 dc 04 10 8f c0\s+pop2\s+r31,r24
> +\s*[a-f0-9]+:\s*62 f4 e4 18 8f c0\s+pop2p\s+rbx,rax
> +\s*[a-f0-9]+:\s*62 d4 f4 10 8f c0\s+pop2p\s+r17,r8
> +\s*[a-f0-9]+:\s*62 dc b4 18 8f c7\s+pop2p\s+r9,r31
> +\s*[a-f0-9]+:\s*62 dc 84 10 8f c0\s+pop2p\s+r31,r24
> +\s*[a-f0-9]+:\s*62 f4 7c 18 ff f3\s+push2\s+rax,rbx
> +\s*[a-f0-9]+:\s*62 fc 3c 18 ff f1\s+push2\s+r8,r17
> +\s*[a-f0-9]+:\s*62 d4 04 10 ff f1\s+push2\s+r31,r9
> +\s*[a-f0-9]+:\s*62 dc 3c 10 ff f7\s+push2\s+r24,r31
> +\s*[a-f0-9]+:\s*62 f4 fc 18 ff f3\s+push2p\s+rax,rbx
> +\s*[a-f0-9]+:\s*62 fc bc 18 ff f1\s+push2p\s+r8,r17
> +\s*[a-f0-9]+:\s*62 d4 84 10 ff f1\s+push2p\s+r31,r9
> +\s*[a-f0-9]+:\s*62 dc bc 10 ff f7\s+push2p\s+r24,r31
> +\s*[a-f0-9]+:\s*62 f4 64 18 8f c0\s+pop2\s+rbx,rax
> +\s*[a-f0-9]+:\s*62 d4 74 10 8f c0\s+pop2\s+r17,r8
> +\s*[a-f0-9]+:\s*62 dc 34 18 8f c7\s+pop2\s+r9,r31
> +\s*[a-f0-9]+:\s*62 dc 04 10 8f c0\s+pop2\s+r31,r24
> +\s*[a-f0-9]+:\s*62 f4 e4 18 8f c0\s+pop2p\s+rbx,rax
> +\s*[a-f0-9]+:\s*62 d4 f4 10 8f c0\s+pop2p\s+r17,r8
> +\s*[a-f0-9]+:\s*62 dc b4 18 8f c7\s+pop2p\s+r9,r31
> +\s*[a-f0-9]+:\s*62 dc 84 10 8f c0\s+pop2p\s+r31,r24
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.l b/gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.l
> new file mode 100644
> index 00000000000..2cd142885a1
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.l
> @@ -0,0 +1,13 @@
> +.* Assembler messages:
> +.*:6: Error: operand size mismatch for `push2'
> +.*:7: Error: operand size mismatch for `push2'
> +.*:8: Error: 'rsp' register cannot be used for `push2'
> +.*:9: Error: 'rsp' register cannot be used for `push2'
> +.*:10: Error: operand size mismatch for `push2p'
> +.*:11: Error: 'rsp' register cannot be used for `push2p'
> +.*:12: Error: operand size mismatch for `pop2'
> +.*:13: Error: 'rsp' register cannot be used for `pop2'
> +.*:14: Error: 'rsp' register cannot be used for `pop2'
> +.*:15: Error: two dest registers must be distinct for `pop2'
> +.*:16: Error: 'rsp' register cannot be used for `pop2p'
> +.*:17: Error: two dest registers must be distinct for `pop2p'
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.s b/gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.s
> new file mode 100644
> index 00000000000..83cef97d57e
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-push2pop2-inval.s
> @@ -0,0 +1,17 @@
> +# Check illegal APX-Push2Pop2 instructions
> +
> + .allow_index_reg
> + .text
> +_start:
> + push2 %ax, %bx
> + push2 %eax, %ebx
> + push2 %rsp, %r17
> + push2 %r17, %rsp
> + push2p %eax, %ebx
> + push2p %rsp, %r17
> + pop2 %ax, %bx
> + pop2 %rax, %rsp
> + pop2 %rsp, %rax
> + pop2 %r12, %r12
> + pop2p %rax, %rsp
> + pop2p %r12, %r12
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-push2pop2.d b/gas/testsuite/gas/i386/x86-64-apx-push2pop2.d
> new file mode 100644
> index 00000000000..54f22a7f94e
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-push2pop2.d
> @@ -0,0 +1,42 @@
> +#as: --64
> +#objdump: -dw
> +#name: x86_64 APX-push2pop2 insns
> +#source: x86-64-apx-push2pop2.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*62 f4 7c 18 ff f3\s+push2\s+%rbx,%rax
> +\s*[a-f0-9]+:\s*62 fc 3c 18 ff f1\s+push2\s+%r17,%r8
> +\s*[a-f0-9]+:\s*62 d4 04 10 ff f1\s+push2\s+%r9,%r31
> +\s*[a-f0-9]+:\s*62 dc 3c 10 ff f7\s+push2\s+%r31,%r24
> +\s*[a-f0-9]+:\s*62 f4 fc 18 ff f3\s+push2p\s+%rbx,%rax
> +\s*[a-f0-9]+:\s*62 fc bc 18 ff f1\s+push2p\s+%r17,%r8
> +\s*[a-f0-9]+:\s*62 d4 84 10 ff f1\s+push2p\s+%r9,%r31
> +\s*[a-f0-9]+:\s*62 dc bc 10 ff f7\s+push2p\s+%r31,%r24
> +\s*[a-f0-9]+:\s*62 f4 64 18 8f c0\s+pop2\s+%rax,%rbx
> +\s*[a-f0-9]+:\s*62 d4 74 10 8f c0\s+pop2\s+%r8,%r17
> +\s*[a-f0-9]+:\s*62 dc 34 18 8f c7\s+pop2\s+%r31,%r9
> +\s*[a-f0-9]+:\s*62 dc 04 10 8f c0\s+pop2\s+%r24,%r31
> +\s*[a-f0-9]+:\s*62 f4 e4 18 8f c0\s+pop2p\s+%rax,%rbx
> +\s*[a-f0-9]+:\s*62 d4 f4 10 8f c0\s+pop2p\s+%r8,%r17
> +\s*[a-f0-9]+:\s*62 dc b4 18 8f c7\s+pop2p\s+%r31,%r9
> +\s*[a-f0-9]+:\s*62 dc 84 10 8f c0\s+pop2p\s+%r24,%r31
> +\s*[a-f0-9]+:\s*62 f4 7c 18 ff f3\s+push2\s+%rbx,%rax
> +\s*[a-f0-9]+:\s*62 fc 3c 18 ff f1\s+push2\s+%r17,%r8
> +\s*[a-f0-9]+:\s*62 d4 04 10 ff f1\s+push2\s+%r9,%r31
> +\s*[a-f0-9]+:\s*62 dc 3c 10 ff f7\s+push2\s+%r31,%r24
> +\s*[a-f0-9]+:\s*62 f4 fc 18 ff f3\s+push2p\s+%rbx,%rax
> +\s*[a-f0-9]+:\s*62 fc bc 18 ff f1\s+push2p\s+%r17,%r8
> +\s*[a-f0-9]+:\s*62 d4 84 10 ff f1\s+push2p\s+%r9,%r31
> +\s*[a-f0-9]+:\s*62 dc bc 10 ff f7\s+push2p\s+%r31,%r24
> +\s*[a-f0-9]+:\s*62 f4 64 18 8f c0\s+pop2\s+%rax,%rbx
> +\s*[a-f0-9]+:\s*62 d4 74 10 8f c0\s+pop2\s+%r8,%r17
> +\s*[a-f0-9]+:\s*62 dc 34 18 8f c7\s+pop2\s+%r31,%r9
> +\s*[a-f0-9]+:\s*62 dc 04 10 8f c0\s+pop2\s+%r24,%r31
> +\s*[a-f0-9]+:\s*62 f4 e4 18 8f c0\s+pop2p\s+%rax,%rbx
> +\s*[a-f0-9]+:\s*62 d4 f4 10 8f c0\s+pop2p\s+%r8,%r17
> +\s*[a-f0-9]+:\s*62 dc b4 18 8f c7\s+pop2p\s+%r31,%r9
> +\s*[a-f0-9]+:\s*62 dc 84 10 8f c0\s+pop2p\s+%r24,%r31
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-push2pop2.s b/gas/testsuite/gas/i386/x86-64-apx-push2pop2.s
> new file mode 100644
> index 00000000000..5c28c13ba2e
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-push2pop2.s
> @@ -0,0 +1,39 @@
> +# Check 64bit APX-Push2Pop2 instructions
> +
> + .allow_index_reg
> + .text
> +_start:
> + push2 %rbx, %rax
> + push2 %r17, %r8
> + push2 %r9, %r31
> + push2 %r31, %r24
> + push2p %rbx, %rax
> + push2p %r17, %r8
> + push2p %r9, %r31
> + push2p %r31, %r24
> + pop2 %rax, %rbx
> + pop2 %r8, %r17
> + pop2 %r31, %r9
> + pop2 %r24, %r31
> + pop2p %rax, %rbx
> + pop2p %r8, %r17
> + pop2p %r31, %r9
> + pop2p %r24, %r31
> +
> + .intel_syntax noprefix
> + push2 rax, rbx
> + push2 r8, r17
> + push2 r31, r9
> + push2 r24, r31
> + push2p rax, rbx
> + push2p r8, r17
> + push2p r31, r9
> + push2p r24, r31
> + pop2 rbx, rax
> + pop2 r17, r8
> + pop2 r9, r31
> + pop2 r31, r24
> + pop2p rbx, rax
> + pop2p r17, r8
> + pop2p r9, r31
> + pop2p r31, r24
> diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
> index 3a3438a5de3..0e7b5d0c073 100644
> --- a/gas/testsuite/gas/i386/x86-64.exp
> +++ b/gas/testsuite/gas/i386/x86-64.exp
> @@ -345,6 +345,9 @@ run_dump_test "x86-64-avx512dq-rcigrd-intel"
> run_dump_test "x86-64-avx512dq-rcigrd"
> run_dump_test "x86-64-avx512dq-rcigrne-intel"
> run_dump_test "x86-64-avx512dq-rcigrne"
> +run_dump_test "x86-64-apx-push2pop2"
> +run_dump_test "x86-64-apx-push2pop2-intel"
> +run_list_test "x86-64-apx-push2pop2-inval"
> run_dump_test "x86-64-avx512dq-rcigru-intel"
> run_dump_test "x86-64-avx512dq-rcigru"
> run_dump_test "x86-64-avx512dq-rcigrz-intel"
> diff --git a/opcodes/i386-dis-evex-reg.h b/opcodes/i386-dis-evex-reg.h
> index cac3c39c4c5..81bb41646c5 100644
> --- a/opcodes/i386-dis-evex-reg.h
> +++ b/opcodes/i386-dis-evex-reg.h
> @@ -79,6 +79,10 @@
> { "subQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
> { "xorQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
> },
> + /* REG_EVEX_MAP4_8F */
> + {
> + { VEX_W_TABLE (EVEX_W_MAP4_8F_R_0) },
> + },
> /* REG_EVEX_MAP4_F6 */
> {
> { Bad_Opcode },
> @@ -102,4 +106,9 @@
> {
> { "incQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
> { "decQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
> + { Bad_Opcode },
> + { Bad_Opcode },
> + { Bad_Opcode },
> + { Bad_Opcode },
> + { VEX_W_TABLE (EVEX_W_MAP4_FF_R_6) },
> },
> diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
> index b828277d413..12ab29544bb 100644
> --- a/opcodes/i386-dis-evex-w.h
> +++ b/opcodes/i386-dis-evex-w.h
> @@ -442,6 +442,16 @@
> { Bad_Opcode },
> { "vpshrdw", { XM, Vex, EXx, Ib }, 0 },
> },
> + /* EVEX_W_MAP4_8F_R_0 */
> + {
> + { "pop2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
> + { "pop2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
> + },
> + /* EVEX_W_MAP4_FF_R_6 */
> + {
> + { "push2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
> + { "push2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
> + },
> /* EVEX_W_MAP5_5B_P_0 */
> {
> { "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
> diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
> index a8a891d7f0e..4f2ec966457 100644
> --- a/opcodes/i386-dis-evex.h
> +++ b/opcodes/i386-dis-evex.h
> @@ -1035,7 +1035,7 @@ static const struct dis386 evex_table[][256] = {
> { Bad_Opcode },
> { Bad_Opcode },
> { Bad_Opcode },
> - { Bad_Opcode },
> + { REG_TABLE (REG_EVEX_MAP4_8F) },
> /* 90 */
> { Bad_Opcode },
> { Bad_Opcode },
> diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
> index 1bb2882d839..9daef6fa9fd 100644
> --- a/opcodes/i386-dis.c
> +++ b/opcodes/i386-dis.c
> @@ -105,6 +105,7 @@ static bool FXSAVE_Fixup (instr_info *, int, int);
> static bool MOVSXD_Fixup (instr_info *, int, int);
> static bool DistinctDest_Fixup (instr_info *, int, int);
> static bool PREFETCHI_Fixup (instr_info *, int, int);
> +static bool PUSH2_POP2_Fixup (instr_info *, int, int);
>
> static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
> enum disassembler_style,
> @@ -900,6 +901,7 @@ enum
> REG_EVEX_MAP4_80,
> REG_EVEX_MAP4_81,
> REG_EVEX_MAP4_83,
> + REG_EVEX_MAP4_8F,
> REG_EVEX_MAP4_F6,
> REG_EVEX_MAP4_F7,
> REG_EVEX_MAP4_FE,
> @@ -1739,6 +1741,9 @@ enum
> EVEX_W_0F3A70,
> EVEX_W_0F3A72,
>
> + EVEX_W_MAP4_8F_R_0,
> + EVEX_W_MAP4_FF_R_6,
> +
> EVEX_W_MAP5_5B_P_0,
> EVEX_W_MAP5_7A_P_3,
> };
> @@ -13510,6 +13515,9 @@ OP_VEX (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
> case b_mode:
> names = att_names8rex;
> break;
> + case q_mode:
> + names = att_names64;
> + break;
> case mask_bd_mode:
> case mask_mode:
> if (reg > 0x7)
> @@ -13894,3 +13902,26 @@ PREFETCHI_Fixup (instr_info *ins, int bytemode, int sizeflag)
>
> return OP_M (ins, bytemode, sizeflag);
> }
> +
> +static bool
> +PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
> +{
> + if (ins->modrm.mod != 3)
> + return true;
> +
> + unsigned int vvvv_reg = ins->vex.register_specifier
> + | (!ins->vex.v << 4);
> + unsigned int rm_reg = ins->modrm.rm + (ins->rex & REX_B ? 8 : 0)
> + + (ins->rex2 & REX_B ? 16 : 0);
> +
> + /* Push2/Pop2 cannot use RSP and Pop2 cannot pop two same registers. */
> + if (!ins->vex.nd || vvvv_reg == 0x4 || rm_reg == 0x4
> + || (!ins->modrm.reg
> + && vvvv_reg == rm_reg))
> + {
> + oappend (ins, "(bad)");
> + return true;
> + }
> +
> + return OP_VEX (ins, bytemode, sizeflag);
> +}
> diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
> index 54c659099af..900ca36d286 100644
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3480,3 +3480,12 @@ uwrmsr, 0xf30f38f8, USER_MSR, Modrm|NoSuf|NoRex64, { Reg64, Reg64 }
> uwrmsr, 0xf3f8/0, USER_MSR, Modrm|Vex128|VexMap7|VexW0|NoSuf, { Imm32, Reg64 }
>
> // USER_MSR instructions end.
> +
> +// APX Push2/Pop2 instructions.
> +
> +push2, 0xff/6, APX_F, Modrm|VexW0|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
> +push2p, 0xff/6, APX_F, Modrm|VexW1|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
> +pop2, 0x8f/0, APX_F, Modrm|VexW0|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
> +pop2p, 0x8f/0, APX_F, Modrm|VexW1|EVex128|EVexMap4|VexVVVV|No_bSuf|No_wSuf|No_lSuf|No_sSuf, { Reg64, Reg64 }
> +
> +// APX Push2/Pop2 instructions end.
> --
> 2.25.1
>
OK.
Thanks.
H.J.
next prev parent reply other threads:[~2023-12-28 1:55 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-28 1:27 [PATCH V5 0/9] Support Intel APX EGPR Cui, Lili
2023-12-28 1:27 ` [PATCH V5 1/9] Support APX GPR32 with rex2 prefix Cui, Lili
2023-12-28 1:53 ` H.J. Lu
2024-01-04 8:02 ` Jan Beulich
2024-01-04 11:27 ` Cui, Lili
2024-01-05 14:45 ` Jan Beulich
2024-01-08 3:41 ` Cui, Lili
2023-12-28 1:27 ` [PATCH V5 2/9] Created an empty EVEX_MAP4_ sub-table for EVEX instructions Cui, Lili
2023-12-28 1:54 ` H.J. Lu
2023-12-28 1:27 ` [PATCH V5 3/9] Support APX GPR32 with extend evex prefix Cui, Lili
2023-12-28 1:54 ` H.J. Lu
2023-12-28 13:48 ` Cui, Lili
2023-12-28 1:27 ` [PATCH V5 4/9] Add tests for " Cui, Lili
2023-12-28 1:54 ` H.J. Lu
2023-12-28 1:27 ` [PATCH V5 5/9] Support APX NDD Cui, Lili
2023-12-28 1:55 ` H.J. Lu
2023-12-28 1:27 ` [PATCH V5 6/9] Support APX Push2/Pop2 Cui, Lili
2023-12-28 1:55 ` H.J. Lu [this message]
2023-12-28 1:27 ` [PATCH V5 7/9] Support APX pushp/popp Cui, Lili
2023-12-28 1:56 ` H.J. Lu
2023-12-28 1:27 ` [PATCH V5 8/9] Support APX NDD optimized encoding Cui, Lili
2023-12-28 1:56 ` H.J. Lu
2024-01-05 14:36 ` Jan Beulich
2024-01-08 2:49 ` Hu, Lin1
2023-12-28 1:27 ` [PATCH V5 9/9] Support APX JMPABS for disassembler Cui, Lili
2023-12-28 1:56 ` H.J. Lu
2024-01-05 12:08 ` Jan Beulich
2024-01-08 2:32 ` Hu, Lin1
2024-01-08 7:41 ` Jan Beulich
2024-01-08 7:44 ` Hu, Lin1
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