[COMMITTED] PowerPC: Add support for RFC02655 - Saturating Subtract Instruction

[Peter Bergner <bergner@linux.ibm.com>]

The following patch adds support for Power RFC02655 - Saturating Subtract
Instruction.  When or if this will ever show up in hardware is not determined
or guaranteed, therefore this is enabled using the -mfuture gas option.

Peter

opcodes/
	* ppc-opc.c (XOL): New define.
	(XOL_MASK): Likewise.
	(powerpc_opcodes): Add subfus, subfus., subwus, subwus., subdus, subdus.

gas/
	* testsuite/gas/ppc/rfc02655.s: New test.
	* testsuite/gas/ppc/rfc02655.d: Likewise
	* testsuite/gas/ppc/future-raw.s: Likewise.
	* testsuite/gas/ppc/future-raw.d: Likewise.
	* testsuite/gas/ppc/ppc.exp: Run them.
---
 gas/testsuite/gas/ppc/future-raw.d | 15 +++++++++++++++
 gas/testsuite/gas/ppc/future-raw.s |  6 ++++++
 gas/testsuite/gas/ppc/ppc.exp      |  2 ++
 gas/testsuite/gas/ppc/rfc02655.d   | 19 +++++++++++++++++++
 gas/testsuite/gas/ppc/rfc02655.s   | 10 ++++++++++
 opcodes/ppc-opc.c                  |  9 +++++++++
 6 files changed, 61 insertions(+)
 create mode 100644 gas/testsuite/gas/ppc/future-raw.d
 create mode 100644 gas/testsuite/gas/ppc/future-raw.s
 create mode 100644 gas/testsuite/gas/ppc/rfc02655.d
 create mode 100644 gas/testsuite/gas/ppc/rfc02655.s

diff --git a/gas/testsuite/gas/ppc/future-raw.d b/gas/testsuite/gas/ppc/future-raw.d
new file mode 100644
index 00000000000..c6e71a6f95b
--- /dev/null
+++ b/gas/testsuite/gas/ppc/future-raw.d
@@ -0,0 +1,15 @@
+#as: -mfuture
+#objdump: -dr -Mfuture -Mraw
+#name: Future tests - raw disassembly
+
+.*
+
+
+Disassembly of section \.text:
+
+0+0 <_start>:
+.*:	(90 58 4c 7d|7d 4c 58 90) 	subfus  r10,0,r12,r11
+.*:	(91 58 4c 7d|7d 4c 58 91) 	subfus\. r10,0,r12,r11
+.*:	(90 ac 96 7e|7e 96 ac 90) 	subfus  r20,1,r22,r21
+.*:	(91 ac 96 7e|7e 96 ac 91) 	subfus\. r20,1,r22,r21
+#pass
diff --git a/gas/testsuite/gas/ppc/future-raw.s b/gas/testsuite/gas/ppc/future-raw.s
new file mode 100644
index 00000000000..578b0ce1256
--- /dev/null
+++ b/gas/testsuite/gas/ppc/future-raw.s
@@ -0,0 +1,6 @@
+	.text
+_start:
+	subwus	10,11,12
+	subwus.	10,11,12
+	subdus	20,21,22
+	subdus.	20,21,22
diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp
index 3c593eca805..af890de3faf 100644
--- a/gas/testsuite/gas/ppc/ppc.exp
+++ b/gas/testsuite/gas/ppc/ppc.exp
@@ -146,8 +146,10 @@ run_dump_test "scalarquad"
 run_dump_test "rop"
 run_dump_test "rop-checks"
 run_dump_test "rfc02653"
+run_dump_test "rfc02655"
 run_dump_test "rfc02656"
 run_dump_test "rfc02658"
+run_dump_test "future-raw"
 
 run_dump_test "dcbt"
 run_dump_test "pr27676"
diff --git a/gas/testsuite/gas/ppc/rfc02655.d b/gas/testsuite/gas/ppc/rfc02655.d
new file mode 100644
index 00000000000..3a1d0082f50
--- /dev/null
+++ b/gas/testsuite/gas/ppc/rfc02655.d
@@ -0,0 +1,19 @@
+#as: -mfuture
+#objdump: -dr -Mfuture
+#name: RFC02655 tests
+
+.*
+
+
+Disassembly of section \.text:
+
+0+0 <_start>:
+.*:	(90 58 4c 7d|7d 4c 58 90) 	subwus  r10,r11,r12
+.*:	(90 58 4c 7d|7d 4c 58 90) 	subwus  r10,r11,r12
+.*:	(91 58 4c 7d|7d 4c 58 91) 	subwus\. r10,r11,r12
+.*:	(91 58 4c 7d|7d 4c 58 91) 	subwus\. r10,r11,r12
+.*:	(90 ac 96 7e|7e 96 ac 90) 	subdus  r20,r21,r22
+.*:	(90 ac 96 7e|7e 96 ac 90) 	subdus  r20,r21,r22
+.*:	(91 ac 96 7e|7e 96 ac 91) 	subdus\. r20,r21,r22
+.*:	(91 ac 96 7e|7e 96 ac 91) 	subdus\. r20,r21,r22
+#pass
diff --git a/gas/testsuite/gas/ppc/rfc02655.s b/gas/testsuite/gas/ppc/rfc02655.s
new file mode 100644
index 00000000000..b80c34e1ef7
--- /dev/null
+++ b/gas/testsuite/gas/ppc/rfc02655.s
@@ -0,0 +1,10 @@
+	.text
+_start:
+	subfus	10,0,12,11
+	subwus	10,11,12
+	subfus.	10,0,12,11
+	subwus.	10,11,12
+	subfus	20,1,22,21
+	subdus	20,21,22
+	subfus.	20,1,22,21
+	subdus.	20,21,22
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index e25f1d7702d..112c2c3e760 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -3704,6 +3704,8 @@ const struct powerpc_operand powerpc_operands[] =
 #define BO16 PSWM
   /* The pst field in a SVRM form instruction.  */
 #define pst PSWM
+  /* The L field in a XO form instruction.  */
+#define XOL PSWM
   {  0x1, 10, 0, 0, 0 },
 
   /* IDX bits for quantization in the pair singles instructions.  */
@@ -4775,6 +4777,7 @@ const unsigned int num_powerpc_operands = ARRAY_SIZE (powerpc_operands);
    | ((((uint64_t)(oe)) & 1) << 10)	\
    | (((unsigned long)(rc)) & 1))
 #define XO_MASK XO (0x3f, 0x1ff, 1, 1)
+#define XOL_MASK XO (0x3f, 0x1ff, 0, 1)
 
 /* An XO_MASK with the RB field fixed.  */
 #define XORB_MASK (XO_MASK | RB_MASK)
@@ -7212,6 +7215,12 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"td",		X(31,68),	X_MASK,	     PPC64,	0,		{TO, RA, RB}},
 
 {"lwfcmx",	APU(31,71,0),	APU_MASK,    PPC405,	0,		{FCRT, RA, RB}},
+{"subwus",	XO(31,72,0,0),	XO_MASK,     FUTURE,	EXT,		{RT, RB, RA}},
+{"subwus.",	XO(31,72,0,1),	XO_MASK,     FUTURE,	EXT,		{RT, RB, RA}},
+{"subdus",	XO(31,72,1,0),	XO_MASK,     FUTURE,	EXT,		{RT, RB, RA}},
+{"subdus.",	XO(31,72,1,1),	XO_MASK,     FUTURE,	EXT,		{RT, RB, RA}},
+{"subfus",	XO(31,72,0,0),	XOL_MASK,    FUTURE,	0,		{RT, XOL, RA, RB}},
+{"subfus.",	XO(31,72,0,1),	XOL_MASK,    FUTURE,	0,		{RT, XOL, RA, RB}},
 {"mulhd",	XO(31,73,0,0),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
 {"mulhd.",	XO(31,73,0,1),	XO_MASK,     PPC64,	0,		{RT, RA, RB}},
 
-- 
2.27.0