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From: Jan Beulich <jbeulich@suse.com>
To: "Cui, Lili" <lili.cui@intel.com>
Cc: "hjl.tools@gmail.com" <hjl.tools@gmail.com>,
	"binutils@sourceware.org" <binutils@sourceware.org>
Subject: Re: [PATCH 1/3] x86: Use vexvvvv to encode the vvvv register
Date: Thu, 25 Apr 2024 15:22:41 +0200	[thread overview]
Message-ID: <a382cb2e-8210-42a8-8550-fa9f870c30d2@suse.com> (raw)
In-Reply-To: <SJ0PR11MB560045EC9F0BD5C396BCBEE69E172@SJ0PR11MB5600.namprd11.prod.outlook.com>

On 25.04.2024 15:14, Cui, Lili wrote:
>> On 24.04.2024 09:23, Cui, Lili wrote:
>>> --- a/gas/config/tc-i386.c
>>> +++ b/gas/config/tc-i386.c
>>> @@ -5045,7 +5045,7 @@ optimize_encoding (void)
>>>         */
>>>        i.tm.opcode_space = SPACE_0F;
>>>        i.tm.base_opcode = 0x6c;
>>> -      i.tm.opcode_modifier.vexvvvv = 1;
>>> +      i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1;
>>>
>>>        ++i.operands;
>>>        ++i.reg_operands;
>>> @@ -10432,19 +10432,19 @@ build_modrm_byte (void)
>>>  				     || i.encoding == encoding_evex));
>>>      }
>>>
>>> -  if (i.tm.opcode_modifier.vexvvvv == VexVVVV_DST)
>>> +  switch (i.tm.opcode_modifier.vexvvvv)
>>>      {
>>> -      v = dest;
>>> -      dest-- ;
>>> -    }
>>> -  else
>>> -    {
>>> -      for (v = source + 1; v < dest; ++v)
>>> -	if (v != reg_slot)
>>> -	  break;
>>> -      if (v >= dest)
>>> -	v = ~0;
>>
>> Replacing this by ...
>>
>>> -    }
>>> +    case VexVVVV_SRC1:
>>> +      v =  dest - 1;
>>> +      break;
>>
>> ... just this could do with a word of explanation in the (sadly once again empty)
>> description. While I'm sure this tests out okay for you, it's not immediately clear
>> why the loop can be replaced this easily. Whereas by the end of the series (with
>> SwapSources dropped) this simplification is pretty obvious.
>>
> 
> SDM said "VEX.vvvv encodes the first source register operand". It should be "dest -1". The old logic did not check vexvvvv first, which made the logic here very complicated. I'll add some comments here.
> 
>> As to the deecription once again being empty: This is even more of an issue
>> considering that the title suggests the patch isn't doing anything.
>> After all we already use vexvvvv for the stated purpose.
> 
> The title is "Use vexvvvv to encode the vvvv register", which means that use vexvvvv for the stated purpose.

Well, yes and no: We did so before already, so the title suggests "no
change".

>>>  vpgatherqq, 0x6691, AVX2, Modrm|Vex256|Space0F38|Src1VVVV|VexW1|SwapSources|NoSuf|VecSIB2
>> 56, { RegYMM, Qword|Unspecified|BaseIndex, RegYMM }
>>
>> Anything using SwapSources wants leaving alone in this patch. There's no point
>> touching any of these twice (here and when subsequently you replace
>> SwapSources).
>> That'll also help to limit patch size a little.
>>
> 
> If we keep the old value VexVVVV here, we still need to deal with it in tc-i386.c and i386-opc.h, which is a bit strange.

VexVVVV without a value is the same as Src1VVVV, hence I don't think tc-i386.c
would be affected by leaving those in place.

Jan

  reply	other threads:[~2024-04-25 13:22 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-24  7:23 [PATCH 0/3] x86: Optimize the encoder of " Cui, Lili
2024-04-24  7:23 ` [PATCH 1/3] x86: Use vexvvvv to encode " Cui, Lili
2024-04-24  7:52   ` Jan Beulich
2024-04-25 13:14     ` Cui, Lili
2024-04-25 13:22       ` Jan Beulich [this message]
2024-04-26  5:33         ` Cui, Lili
2024-04-26  6:52           ` Jan Beulich
2024-04-24  7:23 ` [PATCH 2/3] x86: Drop SwapSources Cui, Lili
2024-04-24  8:07   ` Jan Beulich
2024-04-26  8:14     ` Cui, Lili
2024-04-26 10:37       ` Jan Beulich
2024-04-28  4:47         ` Cui, Lili
2024-04-29  6:40           ` Jan Beulich
2024-04-29 12:23             ` Cui, Lili
2024-04-29 13:08               ` Jan Beulich
2024-04-29 13:41                 ` Cui, Lili
2024-04-29 13:49                   ` Jan Beulich
2024-04-30  2:56                     ` Cui, Lili
2024-04-30  6:18                       ` Jan Beulich
2024-04-30  7:34                         ` Cui, Lili
2024-04-30  9:22                           ` Jan Beulich
2024-04-24  7:23 ` [PATCH 3/3] x86: Drop using extension_opcode to encode vvvv register Cui, Lili
2024-04-24  8:19   ` Jan Beulich
2024-04-24  8:27     ` Jan Beulich

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