From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Andrew Waterman <andrew@sifive.com>,
Jim Wilson <jim.wilson.gcc@gmail.com>,
Nelson Chu <nelson@rivosinc.com>,
Kito Cheng <kito.cheng@sifive.com>
Cc: binutils@sourceware.org
Subject: [PATCH] RISC-V: Remove support for non-existing 'Zve32d'
Date: Thu, 3 Aug 2023 01:19:19 +0000 [thread overview]
Message-ID: <c49785eeb1885a92491782d9a7da60353013fdbb.1691025541.git.research_trasio@irq.a4lg.com> (raw)
From: Tsukasa OI <research_trasio@irq.a4lg.com>
Since this "extension" does not exist (on the other hand, 'Zve64d' exists)
and it's not useful if we keep it (as other code portions just ignore
"zve32d"), this commit just removes it.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_supported_std_z_ext): Remove 'Zve32d'
extension from the list.
---
bfd/elfxx-riscv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index ba5165766b2b..1971e6ba6a6b 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1280,7 +1280,6 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
{"zkt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve32x", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve32f", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
- {"zve32d", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve64x", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve64f", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve64d", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
base-commit: 4b177a76d5b759ba631568fb69e8750e99b43647
--
2.41.0
next reply other threads:[~2023-08-03 1:19 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-03 1:19 Tsukasa OI [this message]
2023-08-09 23:37 ` Tsukasa OI
2023-08-11 0:38 ` Nelson Chu
2023-08-11 1:51 ` Palmer Dabbelt
2023-08-11 2:00 ` Tsukasa OI
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