Re: [PATCH] x86: change type of Dwarf2 register numbers in register table

[Jan Beulich <jbeulich@suse.com>]

On 07.02.2024 00:15, Indu Bhagat wrote:
> On 2/2/24 02:25, Jan Beulich wrote:
>> Already the %bnd<N> registers used numbers beyond 127, and eGPR ones are
>> all out of reach for "signed char", at least when CHAR_BITS=8. Switch to
>> "unsigned char", covering appropriately in places where the value
>> returned for "none" actually matters (in tc_x86_parse_to_dw2regnum()
>> this is actually achieved by altering how X_op is set).
>> ---
>> I question the use of flag_code here, btw: Imo the choice ought to be
>> tied to object format, not present assembly mode. Thoughts?
>>
> 
> I dont claim to have a full grasp of the matter yet.
> 
> IIUC, we need to use flag_code as DWARF register number will differ for 
> 32-bit reg vs 64-bit reg?  We do the other set of conditional 
> assignments (to x86_dwarf2_return_column, x86_cie_data_alignment) in 
> md_begin (). What I do not understand is why are the assignments 
> (x86_dwarf2_return_column, x86_cie_data_alignment) not re-done in 
> set_code_flag () as well ? (Consider user/compiler may pass a 
> .code16/.code16gcc..)

The main thing is: When a consumer sees the data, how would it even know
when to use the 32-bit meaning of the numbers, and when to use the 64-bit
one? All it knows is that it is processing an EM_386 / EM_X86_64 object.
(It is my understanding anyway that the Dwarf2 numbers are tied to
object file architecture, not present mode, as the respective ABIs are
establishing both the EM_* value and these numbers.)

>> --- a/gas/config/tc-i386.c
>> +++ b/gas/config/tc-i386.c
>> @@ -5395,10 +5395,8 @@ ginsn_opsize_prefix_p (void)
>>   static unsigned int
>>   ginsn_dw2_regnum (const reg_entry *ireg)
>>   {
>> -  /* PS: Note the data type here as int32_t, because of Dw2Inval (-1).  */
>> -  int32_t dwarf_reg = Dw2Inval;
>>     const reg_entry *temp = ireg;
>> -  unsigned int idx = 0;
>> +  unsigned int dwarf_reg = Dw2Inval, idx = 0;
>>   
>>     /* ginsn creation is available for AMD64 abi only ATM.  Other flag_code
>>        are not expected.  */
>> @@ -5441,7 +5439,7 @@ ginsn_dw2_regnum (const reg_entry *ireg)
>>   
>>     /* Sanity check - failure may indicate state corruption, bad ginsn or
>>        perhaps the i386-reg table and the current function got out of sync.  */
>> -  gas_assert (dwarf_reg >= 0);
>> +  gas_assert (dwarf_reg < Dw2Inval);
>>   
>>     return (unsigned int) dwarf_reg;
> 
> This cast can be removed.

Ah yes, done.

Jan