[PATCH 4/4] x86: fold CpuLM and Cpu64

[Jan Beulich <jbeulich@suse.com>]

Now that CpuLM is used solely in cpu_arch_flags and cpu_arch[] while
Cpu64 is solely used in insn templates, they no longer need to be
treated different from other "ordinary" flags; the only "unusual" one
left if CpuNo64. Fold both, leaving just Cpu64.

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2612,7 +2612,7 @@ update_code_flag (int value, int check)
 {
   PRINTF_LIKE ((*as_error)) = check ? as_fatal : as_bad;
 
-  if (value == CODE_64BIT && !cpu_arch_flags.bitfield.cpulm )
+  if (value == CODE_64BIT && !cpu_arch_flags.bitfield.cpu64 )
     {
       as_error (_("64bit mode not supported on `%s'."),
 		cpu_arch_name ? cpu_arch_name : default_arch);
@@ -2907,7 +2907,7 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED
 	    {
 	      check_cpu_arch_compatible (string, cpu_arch[j].enable);
 
-	      if (flag_code == CODE_64BIT && !cpu_arch[j].enable.bitfield.cpulm )
+	      if (flag_code == CODE_64BIT && !cpu_arch[j].enable.bitfield.cpu64 )
 		{
 		  as_bad (_("64bit mode not supported on `%s'."),
 			  cpu_arch[j].name);
@@ -13986,7 +13986,7 @@ static bool check_register (const reg_en
     }
 
   if (((r->reg_flags & (RegRex64 | RegRex)) || r->reg_type.bitfield.qword)
-      && (!cpu_arch_flags.bitfield.cpulm
+      && (!cpu_arch_flags.bitfield.cpu64
 	  || r->reg_type.bitfield.class != RegCR
 	  || dot_insn ())
       && flag_code != CODE_64BIT)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -262,7 +262,7 @@ static const dependency isa_dependencies
 };
 
 /* This array is populated as process_i386_initializers() walks cpu_flags[].  */
-static unsigned char isa_reverse_deps[Cpu64][Cpu64];
+static unsigned char isa_reverse_deps[CpuMax][CpuMax];
 
 typedef struct bitfield
 {
@@ -325,7 +325,6 @@ static bitfield cpu_flags[] =
   BITFIELD (LWP),
   BITFIELD (BMI),
   BITFIELD (TBM),
-  BITFIELD (LM),
   BITFIELD (Movbe),
   BITFIELD (CX16),
   BITFIELD (LAHF_SAHF),
@@ -726,7 +725,10 @@ add_isa_dependencies (bitfield *flags, c
       *strchr (str, ':') = '\0';
       isa = str;
     }
-  for (i = 0; i < Cpu64; ++i)
+  /* isa_dependencies[] prefers "LM" over "64".  */
+  else if (!strcmp (f, "LM"))
+    isa = "64";
+  for (i = 0; i < CpuMax; ++i)
     if (strcasecmp (flags[i].name, isa) == 0)
       {
 	flags[i].value = value;
@@ -872,10 +874,10 @@ process_i386_cpu_flag (FILE *table, char
       else
 	next = flag + 1;
 
-      /* First we turn on everything except for cpu64, cpuno64, and - if
+      /* First we turn on everything except for cpuno64 and - if
          present - the padding field.  */
       for (i = 0; i < ARRAY_SIZE (flags); i++)
-	if (flags[i].position < Cpu64)
+	if (flags[i].position < CpuNo64)
 	  flags[i].value = 1;
 
       /* Turn off selective bits.  */
@@ -1968,7 +1970,7 @@ process_i386_initializers (void)
 
   process_copyright (fp);
 
-  for (i = 0; i < Cpu64; i++)
+  for (i = 0; i < CpuMax; i++)
     process_i386_cpu_flag (fp, "0", cpu_flags[i].name, "", "  ", -1, i);
 
   for (i = 0; i < ARRAY_SIZE (isa_dependencies); i++)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -147,8 +147,6 @@ enum i386_cpu
   CpuVMFUNC,
   /* Intel MPX Instructions required  */
   CpuMPX,
-  /* 64bit support available, used by -march= in assembler.  */
-  CpuLM,
   /* RDRSEED instruction required.  */
   CpuRDSEED,
   /* Multi-presisionn add-carry instructions are required.  */
@@ -309,6 +307,8 @@ enum i386_cpu
   Cpu3dnow,
   /* 3dnow! Extensions support required */
   Cpu3dnowA,
+  /* 64bit support required  */
+  Cpu64,
   /* AVX support required */
   CpuAVX,
   /* HLE support required */
@@ -317,8 +317,6 @@ enum i386_cpu
   CpuAVX512F,
   /* Intel AVX-512 VL Instructions support required.  */
   CpuAVX512VL,
-  /* 64bit support required  */
-  Cpu64,
   /* Not supported in the 64bit mode  */
   CpuNo64,
 
@@ -349,12 +347,12 @@ enum i386_cpu
 		   cpu387:1, \
 		   cpu3dnow:1, \
 		   cpu3dnowa:1, \
+		   cpu64:1, \
 		   cpuavx:1, \
 		   cpuhle:1, \
 		   cpuavx512f:1, \
 		   cpuavx512vl:1, \
-      /* NOTE: These two fields need to remain last and in this order. */ \
-		   cpu64:1, \
+      /* NOTE: This field needs to remain last. */ \
 		   cpuno64:1
 
 typedef union i386_cpu_attr
@@ -435,7 +433,6 @@ typedef union i386_cpu_flags
       unsigned int cpuinvpcid:1;
       unsigned int cpuvmfunc:1;
       unsigned int cpumpx:1;
-      unsigned int cpulm:1;
       unsigned int cpurdseed:1;
       unsigned int cpuadx:1;
       unsigned int cpuprfchw:1;