* [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
@ 2023-10-26 9:35 Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 1/3] as: Add new atomic instructions in LoongArch v1.1 Jiajie Chen
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Jiajie Chen @ 2023-10-26 9:35 UTC (permalink / raw)
To: binutils; +Cc: xuchenghua, liuzhensong, mengqinggang, Jiajie Chen
LoongArch V1.1 release is out at
https://www.loongson.cn/uploads/images/2023102309132647981.%E9%BE%99%E8%8A%AF%E6%9E%B6%E6%9E%84%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C%E5%8D%B7%E4%B8%80_r1p10.pdf.
It brings the following new instructions:
- atomic cas: amcas{_db}.b/h/w/d
- ll-sc: sc.q, llacq.w/d, screl.w/d
- estimated reciprocal: frecipe/frsqrte and their vector counterpart
Support and tests for these new instructions are added.
Changes since v1:
- Add support for "sc.q r4, r5, r6, 0" and "llacq.w/d / screl.w/d r4,
r5, 0"
Jiajie Chen (3):
as: Add new atomic instructions in LoongArch v1.1
as: Add new estimated reciprocal instructions in LoongArch v1.1
gas: add loongarch v1.1 to NEWS
gas/NEWS | 2 +
gas/config/tc-loongarch.c | 6 ++-
gas/testsuite/gas/loongarch/float_op.d | 4 ++
gas/testsuite/gas/loongarch/float_op.s | 4 ++
gas/testsuite/gas/loongarch/load_store_op.d | 42 ++++++++++++++++
gas/testsuite/gas/loongarch/load_store_op.s | 42 ++++++++++++++++
gas/testsuite/gas/loongarch/vector.d | 8 +++
gas/testsuite/gas/loongarch/vector.s | 8 +++
opcodes/loongarch-opc.c | 54 +++++++++++++++++++++
9 files changed, 168 insertions(+), 2 deletions(-)
--
2.42.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/3] as: Add new atomic instructions in LoongArch v1.1
2023-10-26 9:35 [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Jiajie Chen
@ 2023-10-26 9:35 ` Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 2/3] as: Add new estimated reciprocal " Jiajie Chen
` (3 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Jiajie Chen @ 2023-10-26 9:35 UTC (permalink / raw)
To: binutils; +Cc: xuchenghua, liuzhensong, mengqinggang, Jiajie Chen
New atomic instructions in LoongArch v1.1:
- sc.q
- llacq.w/d
- screl.w/d
- amcas{_db}.b/h/w/d
- amswap{_db}.b/h
- amadd{_db}.b/h
Signed-off-by: Jiajie Chen <c@jia.je>
---
gas/config/tc-loongarch.c | 6 ++-
gas/testsuite/gas/loongarch/load_store_op.d | 42 +++++++++++++++++++++
gas/testsuite/gas/loongarch/load_store_op.s | 42 +++++++++++++++++++++
opcodes/loongarch-opc.c | 42 +++++++++++++++++++++
4 files changed, 130 insertions(+), 2 deletions(-)
diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
index 33f3e71ce2f..49c70bf130b 100644
--- a/gas/config/tc-loongarch.c
+++ b/gas/config/tc-loongarch.c
@@ -898,8 +898,10 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip)
ip->reloc_num++;
}
else if (ip->insn->mask == 0xffff8000
- /* amswap.w rd, rk, rj */
- && ((ip->insn_bin & 0xfff00000) == 0x38600000
+ /* amcas.b rd, rk, rj */
+ && ((ip->insn_bin & 0xfff80000) == 0x38580000
+ /* amswap.w rd, rk, rj */
+ || (ip->insn_bin & 0xfff00000) == 0x38600000
/* ammax_db.wu rd, rk, rj */
|| (ip->insn_bin & 0xffff0000) == 0x38700000
/* ammin_db.wu rd, rk, rj */
diff --git a/gas/testsuite/gas/loongarch/load_store_op.d b/gas/testsuite/gas/loongarch/load_store_op.d
index e1b4dea1851..0ad83167bbc 100644
--- a/gas/testsuite/gas/loongarch/load_store_op.d
+++ b/gas/testsuite/gas/loongarch/load_store_op.d
@@ -176,3 +176,45 @@ Disassembly of section .text:
298:[ ]+387e98a4 [ ]+stle.h[ ]+[ ]+\$a0, \$a1, \$a2
29c:[ ]+387f18a4 [ ]+stle.w[ ]+[ ]+\$a0, \$a1, \$a2
2a0:[ ]+387f98a4 [ ]+stle.d[ ]+[ ]+\$a0, \$a1, \$a2
+ 2a4:[ ]+385714c4 [ ]+sc.q[ ]+[ ]+\$a0, \$a1, \$a2
+ 2a8:[ ]+385714c4 [ ]+sc.q[ ]+[ ]+\$a0, \$a1, \$a2
+ 2ac:[ ]+385780a4 [ ]+llacq.w[ ]+[ ]+\$a0, \$a1
+ 2b0:[ ]+385780a4 [ ]+llacq.w[ ]+[ ]+\$a0, \$a1
+ 2b4:[ ]+385784a4 [ ]+screl.w[ ]+[ ]+\$a0, \$a1
+ 2b8:[ ]+385784a4 [ ]+screl.w[ ]+[ ]+\$a0, \$a1
+ 2bc:[ ]+385788a4 [ ]+llacq.d[ ]+[ ]+\$a0, \$a1
+ 2c0:[ ]+385788a4 [ ]+llacq.d[ ]+[ ]+\$a0, \$a1
+ 2c4:[ ]+38578ca4 [ ]+screl.d[ ]+[ ]+\$a0, \$a1
+ 2c8:[ ]+38578ca4 [ ]+screl.d[ ]+[ ]+\$a0, \$a1
+ 2cc:[ ]+385814c4 [ ]+amcas.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 2d0:[ ]+385818a4 [ ]+amcas.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 2d4:[ ]+385894c4 [ ]+amcas.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 2d8:[ ]+385898a4 [ ]+amcas.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 2dc:[ ]+385914c4 [ ]+amcas.w[ ]+[ ]+\$a0, \$a1, \$a2
+ 2e0:[ ]+385918a4 [ ]+amcas.w[ ]+[ ]+\$a0, \$a2, \$a1
+ 2e4:[ ]+385994c4 [ ]+amcas.d[ ]+[ ]+\$a0, \$a1, \$a2
+ 2e8:[ ]+385998a4 [ ]+amcas.d[ ]+[ ]+\$a0, \$a2, \$a1
+ 2ec:[ ]+385a14c4 [ ]+amcas_db.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 2f0:[ ]+385a18a4 [ ]+amcas_db.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 2f4:[ ]+385a94c4 [ ]+amcas_db.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 2f8:[ ]+385a98a4 [ ]+amcas_db.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 2fc:[ ]+385b14c4 [ ]+amcas_db.w[ ]+[ ]+\$a0, \$a1, \$a2
+ 300:[ ]+385b18a4 [ ]+amcas_db.w[ ]+[ ]+\$a0, \$a2, \$a1
+ 304:[ ]+385b94c4 [ ]+amcas_db.d[ ]+[ ]+\$a0, \$a1, \$a2
+ 308:[ ]+385b98a4 [ ]+amcas_db.d[ ]+[ ]+\$a0, \$a2, \$a1
+ 30c:[ ]+385c14c4 [ ]+amswap.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 310:[ ]+385c18a4 [ ]+amswap.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 314:[ ]+385c94c4 [ ]+amswap.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 318:[ ]+385c98a4 [ ]+amswap.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 31c:[ ]+385d14c4 [ ]+amadd.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 320:[ ]+385d18a4 [ ]+amadd.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 324:[ ]+385d94c4 [ ]+amadd.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 328:[ ]+385d98a4 [ ]+amadd.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 32c:[ ]+385e14c4 [ ]+amswap_db.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 330:[ ]+385e18a4 [ ]+amswap_db.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 334:[ ]+385e94c4 [ ]+amswap_db.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 338:[ ]+385e98a4 [ ]+amswap_db.h[ ]+[ ]+\$a0, \$a2, \$a1
+ 33c:[ ]+385f14c4 [ ]+amadd_db.b[ ]+[ ]+\$a0, \$a1, \$a2
+ 340:[ ]+385f18a4 [ ]+amadd_db.b[ ]+[ ]+\$a0, \$a2, \$a1
+ 344:[ ]+385f94c4 [ ]+amadd_db.h[ ]+[ ]+\$a0, \$a1, \$a2
+ 348:[ ]+385f98a4 [ ]+amadd_db.h[ ]+[ ]+\$a0, \$a2, \$a1
diff --git a/gas/testsuite/gas/loongarch/load_store_op.s b/gas/testsuite/gas/loongarch/load_store_op.s
index efbd124a29c..7912adb1090 100644
--- a/gas/testsuite/gas/loongarch/load_store_op.s
+++ b/gas/testsuite/gas/loongarch/load_store_op.s
@@ -167,3 +167,45 @@ stle.b $r4,$r5,$r6
stle.h $r4,$r5,$r6
stle.w $r4,$r5,$r6
stle.d $r4,$r5,$r6
+sc.q $r4,$r5,$r6,0
+sc.q $r4,$r5,$r6
+llacq.w $r4,$r5,0
+llacq.w $r4,$r5
+screl.w $r4,$r5,0
+screl.w $r4,$r5
+llacq.d $r4,$r5,0
+llacq.d $r4,$r5
+screl.d $r4,$r5,0
+screl.d $r4,$r5
+amcas.b $r4,$r5,$r6,0
+amcas.b $r4,$r6,$r5
+amcas.h $r4,$r5,$r6,0
+amcas.h $r4,$r6,$r5
+amcas.w $r4,$r5,$r6,0
+amcas.w $r4,$r6,$r5
+amcas.d $r4,$r5,$r6,0
+amcas.d $r4,$r6,$r5
+amcas_db.b $r4,$r5,$r6,0
+amcas_db.b $r4,$r6,$r5
+amcas_db.h $r4,$r5,$r6,0
+amcas_db.h $r4,$r6,$r5
+amcas_db.w $r4,$r5,$r6,0
+amcas_db.w $r4,$r6,$r5
+amcas_db.d $r4,$r5,$r6,0
+amcas_db.d $r4,$r6,$r5
+amswap.b $r4,$r5,$r6,0
+amswap.b $r4,$r6,$r5
+amswap.h $r4,$r5,$r6,0
+amswap.h $r4,$r6,$r5
+amadd.b $r4,$r5,$r6,0
+amadd.b $r4,$r6,$r5
+amadd.h $r4,$r5,$r6,0
+amadd.h $r4,$r6,$r5
+amswap_db.b $r4,$r5,$r6,0
+amswap_db.b $r4,$r6,$r5
+amswap_db.h $r4,$r5,$r6,0
+amswap_db.h $r4,$r6,$r5
+amadd_db.b $r4,$r5,$r6,0
+amadd_db.b $r4,$r6,$r5
+amadd_db.h $r4,$r5,$r6,0
+amadd_db.h $r4,$r6,$r5
diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index 362b6581c76..c53725fa501 100644
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -816,6 +816,48 @@ static struct loongarch_opcode loongarch_load_store_opcodes[] =
{ 0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
{ 0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
{ 0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "sc.q", "r,r,r,u0:0", "sc.q %1,%2,%3", 0, 0, 0 },
+ { 0x38570000, 0xffff8000, "sc.q", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "llacq.w", "r,r,u0:0", "llacq.w %1,%2", 0, 0, 0 },
+ { 0x38578000, 0xfffffc00, "llacq.w", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "screl.w", "r,r,u0:0", "screl.w %1,%2", 0, 0, 0 },
+ { 0x38578400, 0xfffffc00, "screl.w", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "llacq.d", "r,r,u0:0", "llacq.d %1,%2", 0, 0, 0 },
+ { 0x38578800, 0xfffffc00, "llacq.d", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "screl.d", "r,r,u0:0", "screl.d %1,%2", 0, 0, 0 },
+ { 0x38578c00, 0xfffffc00, "screl.d", "r0:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.b", "r,r,r,u0:0", "amcas.b %1,%2,%3", 0, 0, 0 },
+ { 0x38580000, 0xffff8000, "amcas.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.h", "r,r,r,u0:0", "amcas.h %1,%2,%3", 0, 0, 0 },
+ { 0x38588000, 0xffff8000, "amcas.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.w", "r,r,r,u0:0", "amcas.w %1,%2,%3", 0, 0, 0 },
+ { 0x38590000, 0xffff8000, "amcas.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas.d", "r,r,r,u0:0", "amcas.d %1,%2,%3", 0, 0, 0 },
+ { 0x38598000, 0xffff8000, "amcas.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.b", "r,r,r,u0:0", "amcas_db.b %1,%2,%3", 0, 0, 0 },
+ { 0x385a0000, 0xffff8000, "amcas_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.h", "r,r,r,u0:0", "amcas_db.h %1,%2,%3", 0, 0, 0 },
+ { 0x385a8000, 0xffff8000, "amcas_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.w", "r,r,r,u0:0", "amcas_db.w %1,%2,%3", 0, 0, 0 },
+ { 0x385b0000, 0xffff8000, "amcas_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amcas_db.d", "r,r,r,u0:0", "amcas_db.d %1,%2,%3", 0, 0, 0 },
+ { 0x385b8000, 0xffff8000, "amcas_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap.b", "r,r,r,u0:0", "amswap.b %1,%2,%3", 0, 0, 0 },
+ { 0x385c0000, 0xffff8000, "amswap.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap.h", "r,r,r,u0:0", "amswap.h %1,%2,%3", 0, 0, 0 },
+ { 0x385c8000, 0xffff8000, "amswap.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd.b", "r,r,r,u0:0", "amadd.b %1,%2,%3", 0, 0, 0 },
+ { 0x385d0000, 0xffff8000, "amadd.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd.h", "r,r,r,u0:0", "amadd.h %1,%2,%3", 0, 0, 0 },
+ { 0x385d8000, 0xffff8000, "amadd.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap_db.b", "r,r,r,u0:0", "amswap_db.b %1,%2,%3", 0, 0, 0 },
+ { 0x385e0000, 0xffff8000, "amswap_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amswap_db.h", "r,r,r,u0:0", "amswap_db.h %1,%2,%3", 0, 0, 0 },
+ { 0x385e8000, 0xffff8000, "amswap_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd_db.b", "r,r,r,u0:0", "amadd_db.b %1,%2,%3", 0, 0, 0 },
+ { 0x385f0000, 0xffff8000, "amadd_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
+ { 0x0, 0x0, "amadd_db.h", "r,r,r,u0:0", "amadd_db.h %1,%2,%3", 0, 0, 0 },
+ { 0x385f8000, 0xffff8000, "amadd_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
{ 0x0, 0x0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0 },
{ 0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
{ 0x0, 0x0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0 },
--
2.42.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/3] as: Add new estimated reciprocal instructions in LoongArch v1.1
2023-10-26 9:35 [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 1/3] as: Add new atomic instructions in LoongArch v1.1 Jiajie Chen
@ 2023-10-26 9:35 ` Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 3/3] gas: add loongarch v1.1 to NEWS Jiajie Chen
` (2 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Jiajie Chen @ 2023-10-26 9:35 UTC (permalink / raw)
To: binutils; +Cc: xuchenghua, liuzhensong, mengqinggang, Jiajie Chen
New estimated reciprocal instructions in LoongArch v1.1:
- frecipe.s/d
- frsqrte.s/d
- vfrecipe.s/d
- vfrsqrte.s/d
- xvfrecipe.s/d
- xvfrsqrte.s/d
Signed-off-by: Jiajie Chen <c@jia.je>
---
gas/testsuite/gas/loongarch/float_op.d | 4 ++++
gas/testsuite/gas/loongarch/float_op.s | 4 ++++
gas/testsuite/gas/loongarch/vector.d | 8 ++++++++
gas/testsuite/gas/loongarch/vector.s | 8 ++++++++
opcodes/loongarch-opc.c | 12 ++++++++++++
5 files changed, 36 insertions(+)
diff --git a/gas/testsuite/gas/loongarch/float_op.d b/gas/testsuite/gas/loongarch/float_op.d
index f9d3b89e4a0..b09e7ba0f21 100644
--- a/gas/testsuite/gas/loongarch/float_op.d
+++ b/gas/testsuite/gas/loongarch/float_op.d
@@ -83,3 +83,7 @@ Disassembly of section .text:
[ ]+124:[ ]+011d2820 [ ]+ffint.d.l[ ]+[ ]+\$fa0, \$fa1
[ ]+128:[ ]+011e4420 [ ]+frint.s[ ]+[ ]+\$fa0, \$fa1
[ ]+12c:[ ]+011e4820 [ ]+frint.d[ ]+[ ]+\$fa0, \$fa1
+[ ]+130:[ ]+01147420 [ ]+frecipe.s[ ]+[ ]+\$fa0, \$fa1
+[ ]+134:[ ]+01147820 [ ]+frecipe.d[ ]+[ ]+\$fa0, \$fa1
+[ ]+138:[ ]+01148420 [ ]+frsqrte.s[ ]+[ ]+\$fa0, \$fa1
+[ ]+13c:[ ]+01148820 [ ]+frsqrte.d[ ]+[ ]+\$fa0, \$fa1
diff --git a/gas/testsuite/gas/loongarch/float_op.s b/gas/testsuite/gas/loongarch/float_op.s
index 2e3ec5b8519..a83be3e3e48 100644
--- a/gas/testsuite/gas/loongarch/float_op.s
+++ b/gas/testsuite/gas/loongarch/float_op.s
@@ -74,3 +74,7 @@ ffint.d.w $f0,$f1
ffint.d.l $f0,$f1
frint.s $f0,$f1
frint.d $f0,$f1
+frecipe.s $f0,$f1
+frecipe.d $f0,$f1
+frsqrte.s $f0,$f1
+frsqrte.d $f0,$f1
diff --git a/gas/testsuite/gas/loongarch/vector.d b/gas/testsuite/gas/loongarch/vector.d
index 1a092bca3b8..4526b3d3640 100644
--- a/gas/testsuite/gas/loongarch/vector.d
+++ b/gas/testsuite/gas/loongarch/vector.d
@@ -1459,3 +1459,11 @@ Disassembly of section .text:
[ ]+16a0:[ ]+77e40420[ ]+xvpermi.w[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1
[ ]+16a4:[ ]+77e80420[ ]+xvpermi.d[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1
[ ]+16a8:[ ]+77ec0420[ ]+xvpermi.q[ ]+\$xr0,[ ]+\$xr1,[ ]+0x1
+[ ]+16ac:[ ]+729d1420[ ]+vfrecipe.s[ ]+\$vr0,[ ]+\$vr1
+[ ]+16b0:[ ]+729d1820[ ]+vfrecipe.d[ ]+\$vr0,[ ]+\$vr1
+[ ]+16b4:[ ]+729d2420[ ]+vfrsqrte.s[ ]+\$vr0,[ ]+\$vr1
+[ ]+16b8:[ ]+729d2820[ ]+vfrsqrte.d[ ]+\$vr0,[ ]+\$vr1
+[ ]+16bc:[ ]+769d1420[ ]+xvfrecipe.s[ ]+\$xr0,[ ]+\$xr1
+[ ]+16c0:[ ]+769d1820[ ]+xvfrecipe.d[ ]+\$xr0,[ ]+\$xr1
+[ ]+16c4:[ ]+769d2420[ ]+xvfrsqrte.s[ ]+\$xr0,[ ]+\$xr1
+[ ]+16c8:[ ]+769d2820[ ]+xvfrsqrte.d[ ]+\$xr0,[ ]+\$xr1
diff --git a/gas/testsuite/gas/loongarch/vector.s b/gas/testsuite/gas/loongarch/vector.s
index fe0369e763e..0283a4b4d53 100644
--- a/gas/testsuite/gas/loongarch/vector.s
+++ b/gas/testsuite/gas/loongarch/vector.s
@@ -1449,3 +1449,11 @@ xvldi $xr0, 1
xvpermi.w $xr0, $xr1, 1
xvpermi.d $xr0, $xr1, 1
xvpermi.q $xr0, $xr1, 1
+vfrecipe.s $vr0, $vr1
+vfrecipe.d $vr0, $vr1
+vfrsqrte.s $vr0, $vr1
+vfrsqrte.d $vr0, $vr1
+xvfrecipe.s $xr0, $xr1
+xvfrecipe.d $xr0, $xr1
+xvfrsqrte.s $xr0, $xr1
+xvfrsqrte.d $xr0, $xr1
diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index c53725fa501..5cd1411a9d2 100644
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -482,6 +482,8 @@ static struct loongarch_opcode loongarch_single_float_opcodes[] =
{ 0x01144400, 0xfffffc00, "fsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x01145400, 0xfffffc00, "frecip.s", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x01146400, 0xfffffc00, "frsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 },
+ { 0x01147400, 0xfffffc00, "frecipe.s", "f0:5,f5:5", 0, 0, 0, 0 },
+ { 0x01148400, 0xfffffc00, "frsqrte.s", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x01149400, 0xfffffc00, "fmov.s", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x0114a400, 0xfffffc00, "movgr2fr.w", "f0:5,r5:5", 0, 0, 0, 0 },
{ 0x0114ac00, 0xfffffc00, "movgr2frh.w", "f0:5,r5:5", 0, 0, 0, 0 },
@@ -528,6 +530,8 @@ static struct loongarch_opcode loongarch_double_float_opcodes[] =
{ 0x01144800, 0xfffffc00, "fsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x01145800, 0xfffffc00, "frecip.d", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x01146800, 0xfffffc00, "frsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 },
+ { 0x01147800, 0xfffffc00, "frecipe.d", "f0:5,f5:5", 0, 0, 0, 0 },
+ { 0x01148800, 0xfffffc00, "frsqrte.d", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x01149800, 0xfffffc00, "fmov.d", "f0:5,f5:5", 0, 0, 0, 0 },
{ 0x0114a800, 0xfffffc00, "movgr2fr.d", "f0:5,r5:5", 0, 0, 0, 0 },
{ 0x0114b800, 0xfffffc00, "movfr2gr.d", "r0:5,f5:5", 0, 0, 0, 0 },
@@ -1424,6 +1428,10 @@ static struct loongarch_opcode loongarch_lsx_opcodes[] =
{ 0x729cf800, 0xfffffc00, "vfrecip.d", "v0:5,v5:5", 0, 0, 0, 0},
{ 0x729d0400, 0xfffffc00, "vfrsqrt.s", "v0:5,v5:5", 0, 0, 0, 0},
{ 0x729d0800, 0xfffffc00, "vfrsqrt.d", "v0:5,v5:5", 0, 0, 0, 0},
+ { 0x729d1400, 0xfffffc00, "vfrecipe.s", "v0:5,v5:5", 0, 0, 0, 0},
+ { 0x729d1800, 0xfffffc00, "vfrecipe.d", "v0:5,v5:5", 0, 0, 0, 0},
+ { 0x729d2400, 0xfffffc00, "vfrsqrte.s", "v0:5,v5:5", 0, 0, 0, 0},
+ { 0x729d2800, 0xfffffc00, "vfrsqrte.d", "v0:5,v5:5", 0, 0, 0, 0},
{ 0x729d3400, 0xfffffc00, "vfrint.s", "v0:5,v5:5", 0, 0, 0, 0},
{ 0x729d3800, 0xfffffc00, "vfrint.d", "v0:5,v5:5", 0, 0, 0, 0},
{ 0x729d4400, 0xfffffc00, "vfrintrm.s", "v0:5,v5:5", 0, 0, 0, 0},
@@ -2169,6 +2177,10 @@ static struct loongarch_opcode loongarch_lasx_opcodes[] =
{ 0x769cf800, 0xfffffc00, "xvfrecip.d", "x0:5,x5:5", 0, 0, 0, 0},
{ 0x769d0400, 0xfffffc00, "xvfrsqrt.s", "x0:5,x5:5", 0, 0, 0, 0},
{ 0x769d0800, 0xfffffc00, "xvfrsqrt.d", "x0:5,x5:5", 0, 0, 0, 0},
+ { 0x769d1400, 0xfffffc00, "xvfrecipe.s", "x0:5,x5:5", 0, 0, 0, 0},
+ { 0x769d1800, 0xfffffc00, "xvfrecipe.d", "x0:5,x5:5", 0, 0, 0, 0},
+ { 0x769d2400, 0xfffffc00, "xvfrsqrte.s", "x0:5,x5:5", 0, 0, 0, 0},
+ { 0x769d2800, 0xfffffc00, "xvfrsqrte.d", "x0:5,x5:5", 0, 0, 0, 0},
{ 0x769d3400, 0xfffffc00, "xvfrint.s", "x0:5,x5:5", 0, 0, 0, 0},
{ 0x769d3800, 0xfffffc00, "xvfrint.d", "x0:5,x5:5", 0, 0, 0, 0},
{ 0x769d4400, 0xfffffc00, "xvfrintrm.s", "x0:5,x5:5", 0, 0, 0, 0},
--
2.42.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 3/3] gas: add loongarch v1.1 to NEWS
2023-10-26 9:35 [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 1/3] as: Add new atomic instructions in LoongArch v1.1 Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 2/3] as: Add new estimated reciprocal " Jiajie Chen
@ 2023-10-26 9:35 ` Jiajie Chen
2023-11-15 23:59 ` [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Xi Ruoyao
2023-11-20 9:10 ` mengqinggang
4 siblings, 0 replies; 10+ messages in thread
From: Jiajie Chen @ 2023-10-26 9:35 UTC (permalink / raw)
To: binutils; +Cc: xuchenghua, liuzhensong, mengqinggang, Jiajie Chen
Signed-off-by: Jiajie Chen <c@jia.je>
---
gas/NEWS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gas/NEWS b/gas/NEWS
index 71a1269b893..2c7be79f003 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -18,6 +18,8 @@
* Add support for Cortex-X4 for AArch64.
+* Add support for LoongArch V1.1 instructions.
+
Changes in 2.41:
* Add support for the KVX instruction set.
--
2.42.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
2023-10-26 9:35 [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Jiajie Chen
` (2 preceding siblings ...)
2023-10-26 9:35 ` [PATCH v2 3/3] gas: add loongarch v1.1 to NEWS Jiajie Chen
@ 2023-11-15 23:59 ` Xi Ruoyao
2023-11-16 3:02 ` mengqinggang
2023-11-20 9:10 ` mengqinggang
4 siblings, 1 reply; 10+ messages in thread
From: Xi Ruoyao @ 2023-11-15 23:59 UTC (permalink / raw)
To: Jiajie Chen, binutils; +Cc: xuchenghua, liuzhensong, mengqinggang
Ping. Now we are very close to the end of GCC 14 stage 1 and we need
Binutils support for adding LA664 features into GCC.
On Thu, 2023-10-26 at 17:35 +0800, Jiajie Chen wrote:
> LoongArch V1.1 release is out at
> https://www.loongson.cn/uploads/images/2023102309132647981.%E9%BE%99%E8%8A%AF%E6%9E%B6%E6%9E%84%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C%E5%8D%B7%E4%B8%80_r1p10.pdf.
>
> It brings the following new instructions:
>
> - atomic cas: amcas{_db}.b/h/w/d
> - ll-sc: sc.q, llacq.w/d, screl.w/d
> - estimated reciprocal: frecipe/frsqrte and their vector counterpart
>
> Support and tests for these new instructions are added.
>
> Changes since v1:
>
> - Add support for "sc.q r4, r5, r6, 0" and "llacq.w/d / screl.w/d r4,
> r5, 0"
>
> Jiajie Chen (3):
> as: Add new atomic instructions in LoongArch v1.1
> as: Add new estimated reciprocal instructions in LoongArch v1.1
> gas: add loongarch v1.1 to NEWS
>
> gas/NEWS | 2 +
> gas/config/tc-loongarch.c | 6 ++-
> gas/testsuite/gas/loongarch/float_op.d | 4 ++
> gas/testsuite/gas/loongarch/float_op.s | 4 ++
> gas/testsuite/gas/loongarch/load_store_op.d | 42 ++++++++++++++++
> gas/testsuite/gas/loongarch/load_store_op.s | 42 ++++++++++++++++
> gas/testsuite/gas/loongarch/vector.d | 8 +++
> gas/testsuite/gas/loongarch/vector.s | 8 +++
> opcodes/loongarch-opc.c | 54 +++++++++++++++++++++
> 9 files changed, 168 insertions(+), 2 deletions(-)
>
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
2023-11-15 23:59 ` [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Xi Ruoyao
@ 2023-11-16 3:02 ` mengqinggang
2023-11-16 13:43 ` Xi Ruoyao
0 siblings, 1 reply; 10+ messages in thread
From: mengqinggang @ 2023-11-16 3:02 UTC (permalink / raw)
To: Xi Ruoyao, Jiajie Chen, binutils; +Cc: xuchenghua, liuzhensong
It waiting for an English manual.
在 2023/11/16 上午7:59, Xi Ruoyao 写道:
> Ping. Now we are very close to the end of GCC 14 stage 1 and we need
> Binutils support for adding LA664 features into GCC.
>
> On Thu, 2023-10-26 at 17:35 +0800, Jiajie Chen wrote:
>> LoongArch V1.1 release is out at
>> https://www.loongson.cn/uploads/images/2023102309132647981.%E9%BE%99%E8%8A%AF%E6%9E%B6%E6%9E%84%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C%E5%8D%B7%E4%B8%80_r1p10.pdf.
>>
>> It brings the following new instructions:
>>
>> - atomic cas: amcas{_db}.b/h/w/d
>> - ll-sc: sc.q, llacq.w/d, screl.w/d
>> - estimated reciprocal: frecipe/frsqrte and their vector counterpart
>>
>> Support and tests for these new instructions are added.
>>
>> Changes since v1:
>>
>> - Add support for "sc.q r4, r5, r6, 0" and "llacq.w/d / screl.w/d r4,
>> r5, 0"
>>
>> Jiajie Chen (3):
>> as: Add new atomic instructions in LoongArch v1.1
>> as: Add new estimated reciprocal instructions in LoongArch v1.1
>> gas: add loongarch v1.1 to NEWS
>>
>> gas/NEWS | 2 +
>> gas/config/tc-loongarch.c | 6 ++-
>> gas/testsuite/gas/loongarch/float_op.d | 4 ++
>> gas/testsuite/gas/loongarch/float_op.s | 4 ++
>> gas/testsuite/gas/loongarch/load_store_op.d | 42 ++++++++++++++++
>> gas/testsuite/gas/loongarch/load_store_op.s | 42 ++++++++++++++++
>> gas/testsuite/gas/loongarch/vector.d | 8 +++
>> gas/testsuite/gas/loongarch/vector.s | 8 +++
>> opcodes/loongarch-opc.c | 54 +++++++++++++++++++++
>> 9 files changed, 168 insertions(+), 2 deletions(-)
>>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
2023-11-16 3:02 ` mengqinggang
@ 2023-11-16 13:43 ` Xi Ruoyao
2023-11-17 1:22 ` mengqinggang
2023-11-17 9:28 ` mengqinggang
0 siblings, 2 replies; 10+ messages in thread
From: Xi Ruoyao @ 2023-11-16 13:43 UTC (permalink / raw)
To: mengqinggang, Jiajie Chen, binutils; +Cc: xuchenghua, liuzhensong
On Thu, 2023-11-16 at 11:02 +0800, mengqinggang wrote:
> It waiting for an English manual.
I guess the manual will be released on Nov 28, but GCC 14 stage 1 ends
on Nov 19.
Does the mnemonics in this series look OK to you? If yes then I can
start to use them in GCC (and a document change for minimal GAS version
required by -mxxx options can be added in Stage 3 or 4).
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
2023-11-16 13:43 ` Xi Ruoyao
@ 2023-11-17 1:22 ` mengqinggang
2023-11-17 9:28 ` mengqinggang
1 sibling, 0 replies; 10+ messages in thread
From: mengqinggang @ 2023-11-17 1:22 UTC (permalink / raw)
To: Xi Ruoyao, Jiajie Chen, binutils; +Cc: xuchenghua, liuzhensong
Yeah, it look OK to me.
在 2023/11/16 下午9:43, Xi Ruoyao 写道:
> On Thu, 2023-11-16 at 11:02 +0800, mengqinggang wrote:
>> It waiting for an English manual.
> I guess the manual will be released on Nov 28, but GCC 14 stage 1 ends
> on Nov 19.
>
> Does the mnemonics in this series look OK to you? If yes then I can
> start to use them in GCC (and a document change for minimal GAS version
> required by -mxxx options can be added in Stage 3 or 4).
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
2023-11-16 13:43 ` Xi Ruoyao
2023-11-17 1:22 ` mengqinggang
@ 2023-11-17 9:28 ` mengqinggang
1 sibling, 0 replies; 10+ messages in thread
From: mengqinggang @ 2023-11-17 9:28 UTC (permalink / raw)
To: Xi Ruoyao, Jiajie Chen, binutils; +Cc: xuchenghua, liuzhensong
The V1.1 English manual has been released at:
https://github.com/loongson/LoongArch-Documentation
在 2023/11/16 下午9:43, Xi Ruoyao 写道:
> On Thu, 2023-11-16 at 11:02 +0800, mengqinggang wrote:
>> It waiting for an English manual.
> I guess the manual will be released on Nov 28, but GCC 14 stage 1 ends
> on Nov 19.
>
> Does the mnemonics in this series look OK to you? If yes then I can
> start to use them in GCC (and a document change for minimal GAS version
> required by -mxxx options can be added in Stage 3 or 4).
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/3] Add support for LoongArch V1.1 instructions
2023-10-26 9:35 [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Jiajie Chen
` (3 preceding siblings ...)
2023-11-15 23:59 ` [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Xi Ruoyao
@ 2023-11-20 9:10 ` mengqinggang
4 siblings, 0 replies; 10+ messages in thread
From: mengqinggang @ 2023-11-20 9:10 UTC (permalink / raw)
To: Jiajie Chen, binutils; +Cc: xuchenghua, liuzhensong
Please change the link to
https://github.com/loongson/LoongArch-Documentation.
在 2023/10/26 下午5:35, Jiajie Chen 写道:
> LoongArch V1.1 release is out at
> https://www.loongson.cn/uploads/images/2023102309132647981.%E9%BE%99%E8%8A%AF%E6%9E%B6%E6%9E%84%E5%8F%82%E8%80%83%E6%89%8B%E5%86%8C%E5%8D%B7%E4%B8%80_r1p10.pdf.
>
> It brings the following new instructions:
>
> - atomic cas: amcas{_db}.b/h/w/d
> - ll-sc: sc.q, llacq.w/d, screl.w/d
> - estimated reciprocal: frecipe/frsqrte and their vector counterpart
>
> Support and tests for these new instructions are added.
>
> Changes since v1:
>
> - Add support for "sc.q r4, r5, r6, 0" and "llacq.w/d / screl.w/d r4,
> r5, 0"
>
> Jiajie Chen (3):
> as: Add new atomic instructions in LoongArch v1.1
> as: Add new estimated reciprocal instructions in LoongArch v1.1
> gas: add loongarch v1.1 to NEWS
>
> gas/NEWS | 2 +
> gas/config/tc-loongarch.c | 6 ++-
> gas/testsuite/gas/loongarch/float_op.d | 4 ++
> gas/testsuite/gas/loongarch/float_op.s | 4 ++
> gas/testsuite/gas/loongarch/load_store_op.d | 42 ++++++++++++++++
> gas/testsuite/gas/loongarch/load_store_op.s | 42 ++++++++++++++++
> gas/testsuite/gas/loongarch/vector.d | 8 +++
> gas/testsuite/gas/loongarch/vector.s | 8 +++
> opcodes/loongarch-opc.c | 54 +++++++++++++++++++++
> 9 files changed, 168 insertions(+), 2 deletions(-)
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-11-20 9:11 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2023-10-26 9:35 [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 1/3] as: Add new atomic instructions in LoongArch v1.1 Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 2/3] as: Add new estimated reciprocal " Jiajie Chen
2023-10-26 9:35 ` [PATCH v2 3/3] gas: add loongarch v1.1 to NEWS Jiajie Chen
2023-11-15 23:59 ` [PATCH v2 0/3] Add support for LoongArch V1.1 instructions Xi Ruoyao
2023-11-16 3:02 ` mengqinggang
2023-11-16 13:43 ` Xi Ruoyao
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