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From: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Binutils <binutils@sourceware.org>,
	Richard Earnshaw <rearnsha@arm.com>,
	Marcus Shawcroft <marcus.shawcroft@arm.com>,
	Nick Clifton <nickc@redhat.com>
Subject: Re: your patches enabling Arm64's SVE 2.1 extension
Date: Mon, 12 Feb 2024 23:16:36 +0000	[thread overview]
Message-ID: <e312301e-9cca-4a54-9263-07a15936aa71@arm.com> (raw)
In-Reply-To: <bd28bee0-6361-42d6-964f-96a96c1811c2@suse.com>

[-- Attachment #1: Type: text/plain, Size: 1992 bytes --]

Hi Jan,

On 2/12/2024 8:00 AM, Jan Beulich wrote:
> Srinath,
>
> may I ask against what specification these were written? There are many
> aspects I can't bring in line with what DDI0596 from December has, i.e.
> even newer than the patch (dating back to October), to a degree that I
> have to even question gas/NEWS stating (supposedly complete) support for
> the feature:
>
> 1) dupq uses encodings different from the doc, in part resulting in
>     supposedly reserved encodings (tsz=0).
>
> 2) extq uses syntax (operands) pretty different from what the doc says.
>
> 3) ld1q and st1q expect a plain first register operand, not one enclosed
>     in figure braces.
>
> 4) ld2q, ld3q, ld4q, st2q, st3q, and st4q don't permit a wrapping
>     sequence of vector registers, when the doc using "modulo" imo can't be
>     read any way other than meaning to permit that.
>
> 5) ld2q's scalar plus scalar encoding has bits 13 and 14 set, which is
>     inconsistent not only with the doc, but also with ld3q and ld4q.
>
> 6) ld3q/st3q and ld4q/st4q scalar plus immediate forms demand an immediate
>     that's a multiple of 2, when the doc says 3 and 4 respectively.

Thanks for the email and posting the issues with the sve2p1 
instructions. I have

checked the above mentioned instructions against the latest specs, the

documentation is correct and the issues are from the posted patches

(needs further tests as well). I will create a bugzilla (if it isn't 
created already)

ticket for all the mentioned instructions and work on fixing those issues.

> 7) orqv, pmov, tblq, tbxq, uzpq{1,2}, and zipq{1,2} are entirely missing.

I'm aware the above mentioned instructions are missing in binutils and 
I'm currently

working on adding support for these instructions. I will update you once 
the patches

are committed.

Regards,

Srinath

> Despite being newer it's of course possible that documentation is what
> actually needs fixing. Can you please clarify which way it is?
>
> Thanks, Jan

  reply	other threads:[~2024-02-12 23:16 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-12  8:00 Jan Beulich
2024-02-12 23:16 ` Srinath Parvathaneni [this message]
2024-02-13  7:24   ` Jan Beulich
2024-02-13  9:55     ` Nick Clifton
2024-02-13 10:48       ` Jan Beulich
2024-02-13 11:11         ` Nick Clifton
2024-02-13 11:39           ` Jan Beulich
2024-03-11  7:14           ` Jan Beulich
2024-02-15 11:21     ` Andrew Carlotti

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