* [PATCH] RISC-V: Fix misplaced @end table
@ 2022-03-20 10:23 Andreas Schwab
2022-03-20 17:58 ` Palmer Dabbelt
0 siblings, 1 reply; 2+ messages in thread
From: Andreas Schwab @ 2022-03-20 10:23 UTC (permalink / raw)
To: binutils
Move the csr-check and arch items inside the table for the .option directive.
---
gas/doc/c-riscv.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index be9c1148355..21d867e9cf0 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -206,7 +206,6 @@ know what you're doing, this should only be at the top of a file.
Enables or disables relaxation. The RISC-V assembler and linker
opportunistically relax some code sequences, but sometimes this behavior is not
desirable.
-@end table
@item csr-check
@itemx no-csr-check
@@ -224,6 +223,7 @@ sometimes. Besides, @samp{.option arch, -i} is illegal, since we cannot
remove the base i extension anytime. If you want to reset the whole ISA
string, you can also use @samp{.option arch, =rv32imac} to overwrite the
previous settings.
+@end table
@cindex INSN directives
@item .insn @var{type}, @var{operand} [,...,@var{operand_n}]
--
2.35.0
--
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] RISC-V: Fix misplaced @end table
2022-03-20 10:23 [PATCH] RISC-V: Fix misplaced @end table Andreas Schwab
@ 2022-03-20 17:58 ` Palmer Dabbelt
0 siblings, 0 replies; 2+ messages in thread
From: Palmer Dabbelt @ 2022-03-20 17:58 UTC (permalink / raw)
To: schwab; +Cc: binutils
On Sun, 20 Mar 2022 03:23:05 PDT (-0700), schwab@linux-m68k.org wrote:
> Move the csr-check and arch items inside the table for the .option directive.
> ---
> gas/doc/c-riscv.texi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
> index be9c1148355..21d867e9cf0 100644
> --- a/gas/doc/c-riscv.texi
> +++ b/gas/doc/c-riscv.texi
> @@ -206,7 +206,6 @@ know what you're doing, this should only be at the top of a file.
> Enables or disables relaxation. The RISC-V assembler and linker
> opportunistically relax some code sequences, but sometimes this behavior is not
> desirable.
> -@end table
>
> @item csr-check
> @itemx no-csr-check
> @@ -224,6 +223,7 @@ sometimes. Besides, @samp{.option arch, -i} is illegal, since we cannot
> remove the base i extension anytime. If you want to reset the whole ISA
> string, you can also use @samp{.option arch, =rv32imac} to overwrite the
> previous settings.
> +@end table
>
> @cindex INSN directives
> @item .insn @var{type}, @var{operand} [,...,@var{operand_n}]
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Not sure what to do about a backport here: this does make the docs look
pretty ugly, but IIUC we'd have to do a release to get the docs
re-generated and that seems like overkill.
LMK if you want me to commit it, otherwise I'm going to assume you will.
Thanks!
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2022-03-20 10:23 [PATCH] RISC-V: Fix misplaced @end table Andreas Schwab
2022-03-20 17:58 ` Palmer Dabbelt
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