* RFA: sh64-media.cpu : msad.ubq has unsigned inputs.
@ 2003-05-21 16:35 Joern Rennecke
2003-05-21 17:11 ` Doug Evans
0 siblings, 1 reply; 3+ messages in thread
From: Joern Rennecke @ 2003-05-21 16:35 UTC (permalink / raw)
To: cgen
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I've found that the msad.ubq instruction in the simulator
operated on signed bytes, although the architecture says these
bytes are unsigned.
Unfortunately, I couldn't regenerate the simulator files in the
current sources, as the sh64-elf build directory is not generated.
--
--------------------------
SuperH (UK) Ltd.
2410 Aztec West / Almondsbury / BRISTOL / BS32 4QX
T:+44 1454 465658
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2003-05-21 J"orn Rennecke <joern.rennecke@superh.com>
* sh64-media.cpu (msad.ubq): Inputs are unsigned bytes.
Index: sh64-media.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/sh64-media.cpu,v
retrieving revision 1.5
diff -p -r1.5 sh64-media.cpu
*** sh64-media.cpu 21 May 2003 14:10:46 -0000 1.5
--- sh64-media.cpu 21 May 2003 16:21:36 -0000
***************
*** 1,6 ****
; SuperH SHmedia instruction set description. -*- Scheme -*-
; Copyright (C) 2000, 2001 Red Hat, Inc.
! ; Copyright (C) 2002 SuperH Ltd
; This file is part of CGEN.
; See file COPYING.CGEN for details.
\f
--- 1,6 ----
; SuperH SHmedia instruction set description. -*- Scheme -*-
; Copyright (C) 2000, 2001 Red Hat, Inc.
! ; Copyright (C) 2002, 2003 SuperH Ltd
; This file is part of CGEN.
; See file COPYING.CGEN for details.
\f
***************
*** 1276,1289 ****
"msad.ubq $rm, $rn, $rd"
(+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
(sequence ((DI acc))
! (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
! (set acc (add DI acc (abs (sub (subword QI rm 1) (subword QI rn 1)))))
! (set acc (add DI acc (abs (sub (subword QI rm 2) (subword QI rn 2)))))
! (set acc (add DI acc (abs (sub (subword QI rm 3) (subword QI rn 3)))))
! (set acc (add DI acc (abs (sub (subword QI rm 4) (subword QI rn 4)))))
! (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5)))))
! (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6)))))
! (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7)))))
(set rd (add rd acc))))
(define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
--- 1276,1297 ----
"msad.ubq $rm, $rn, $rd"
(+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
(sequence ((DI acc))
! (set acc (abs DI (sub (zext SI (subword UQI rm 0))
! (zext SI (subword UQI rn 0)))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 1))
! (zext SI (subword UQI rn 1))))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 2))
! (zext SI (subword UQI rn 2))))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 3))
! (zext SI (subword UQI rn 3))))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 4))
! (zext SI (subword UQI rn 4))))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 5))
! (zext SI (subword UQI rn 5))))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 6))
! (zext SI (subword UQI rn 6))))))
! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 7))
! (zext SI (subword UQI rn 7))))))
(set rd (add rd acc))))
(define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
^ permalink raw reply [flat|nested] 3+ messages in thread* RFA: sh64-media.cpu : msad.ubq has unsigned inputs.
2003-05-21 16:35 RFA: sh64-media.cpu : msad.ubq has unsigned inputs Joern Rennecke
@ 2003-05-21 17:11 ` Doug Evans
2003-05-21 18:50 ` Joern Rennecke
0 siblings, 1 reply; 3+ messages in thread
From: Doug Evans @ 2003-05-21 17:11 UTC (permalink / raw)
To: Joern Rennecke; +Cc: cgen
Joern Rennecke writes:
> I've found that the msad.ubq instruction in the simulator
> operated on signed bytes, although the architecture says these
> bytes are unsigned.
> Unfortunately, I couldn't regenerate the simulator files in the
> current sources, as the sh64-elf build directory is not generated.
Hi.
Umodes don't appear in rtl. From rtl.texi:
These modes do not appear in semantic RTL. Instead, the RTL function
specifies the signedness of its operands where necessary.
To a cpu, a 32 bit register is a 32 bit register.
Ditto for when the 32 bit quantity lives in memory.
It's only in how it is subsequently used or interpreted that
signedness might come into play.
When signedness comes into play on the chip, it's explicitly
specified in the operation, _not_ in the data.
Ergo from this perspective Umodes don't belong in .cpu files.
This is the perspective to use when writing .cpu files.
It's a bug that cgen currently accepts them in rtl.
Eventually you'll see some sort of error message if you try to use
them, but for now there isn't one.
[Heh, another thing to go into cgen 1.1 - either complete removal
or at the very least an error message.]
I _think_ the problem centers around the implicit widening
in the original code. The subtraction is done in QImode
and a QImode value is subsequently added to a DImode value.
[Digression:
In a world in which Umodes don't exist, implicit widening operations
should probably be disallowed, though part of me will loathe the extra
amount of typing required.]
Anyways, at the very least we need to find another way than using UQI here.
What if you made the widening in the original code explicit?
I don't know the architecture, so I don't know what the desired effect
of (abs DI (some-QI-value)) is. Making a wild guess, what about
something like:
- (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
+ (set acc (zext DI (abs QI (sub (subword QI rm 0) (subword QI rn 0)))))
Or maybe it's
- (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
+ (set acc (zext DI (sub (subword QI rm 0) (subword QI rn 0))))
[and so on for the rest of the bytes]
> * sh64-media.cpu (msad.ubq): Inputs are unsigned bytes.
>
> Index: sh64-media.cpu
> ===================================================================
> RCS file: /cvs/src/src/cgen/cpu/sh64-media.cpu,v
> retrieving revision 1.5
> diff -p -r1.5 sh64-media.cpu
> *** sh64-media.cpu 21 May 2003 14:10:46 -0000 1.5
> --- sh64-media.cpu 21 May 2003 16:21:36 -0000
> ***************
> *** 1,6 ****
> ; SuperH SHmedia instruction set description. -*- Scheme -*-
> ; Copyright (C) 2000, 2001 Red Hat, Inc.
> ! ; Copyright (C) 2002 SuperH Ltd
> ; This file is part of CGEN.
> ; See file COPYING.CGEN for details.
> \f
> --- 1,6 ----
> ; SuperH SHmedia instruction set description. -*- Scheme -*-
> ; Copyright (C) 2000, 2001 Red Hat, Inc.
> ! ; Copyright (C) 2002, 2003 SuperH Ltd
> ; This file is part of CGEN.
> ; See file COPYING.CGEN for details.
> \f
> ***************
> *** 1276,1289 ****
> "msad.ubq $rm, $rn, $rd"
> (+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
> (sequence ((DI acc))
> ! (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 1) (subword QI rn 1)))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 2) (subword QI rn 2)))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 3) (subword QI rn 3)))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 4) (subword QI rn 4)))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5)))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6)))))
> ! (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7)))))
> (set rd (add rd acc))))
>
> (define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
> --- 1276,1297 ----
> "msad.ubq $rm, $rn, $rd"
> (+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
> (sequence ((DI acc))
> ! (set acc (abs DI (sub (zext SI (subword UQI rm 0))
> ! (zext SI (subword UQI rn 0)))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 1))
> ! (zext SI (subword UQI rn 1))))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 2))
> ! (zext SI (subword UQI rn 2))))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 3))
> ! (zext SI (subword UQI rn 3))))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 4))
> ! (zext SI (subword UQI rn 4))))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 5))
> ! (zext SI (subword UQI rn 5))))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 6))
> ! (zext SI (subword UQI rn 6))))))
> ! (set acc (add DI acc (abs (sub (zext SI (subword UQI rm 7))
> ! (zext SI (subword UQI rn 7))))))
> (set rd (add rd acc))))
>
> (define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: RFA: sh64-media.cpu : msad.ubq has unsigned inputs.
2003-05-21 17:11 ` Doug Evans
@ 2003-05-21 18:50 ` Joern Rennecke
0 siblings, 0 replies; 3+ messages in thread
From: Joern Rennecke @ 2003-05-21 18:50 UTC (permalink / raw)
To: Doug Evans; +Cc: cgen
[-- Attachment #1: Type: text/plain, Size: 1376 bytes --]
Doug Evans wrote:
> I _think_ the problem centers around the implicit widening
> in the original code. The subtraction is done in QImode
> and a QImode value is subsequently added to a DImode value.
Well, it's more due to a missed explicit widening.
> [Digression:
> In a world in which Umodes don't exist, implicit widening operations
> should probably be disallowed, though part of me will loathe the extra
> amount of typing required.]
It would be unlogical to have to write zero-extensions different
from sign-extensions. So, since the mode doesn't have signedness
information, implicit widening would be missing that information.
> I don't know the architecture, so I don't know what the desired effect
> of (abs DI (some-QI-value)) is. Making a wild guess, what about
> something like:
>
> - (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
> + (set acc (zext DI (abs QI (sub (subword QI rm 0) (subword QI rn 0)))))
>
> Or maybe it's
> - (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
> + (set acc (zext DI (sub (subword QI rm 0) (subword QI rn 0))))
>
> [and so on for the rest of the bytes]
No, the zero-extension should happen before the subtraction.
--
--------------------------
SuperH (UK) Ltd.
2410 Aztec West / Almondsbury / BRISTOL / BS32 4QX
T:+44 1454 465658
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2003-05-21 J"orn Rennecke <joern.rennecke@superh.com>
* sh64-media.cpu (msad.ubq): Inputs are unsigned bytes.
Index: sh64-media.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/sh64-media.cpu,v
retrieving revision 1.5
diff -p -r1.5 sh64-media.cpu
*** sh64-media.cpu 21 May 2003 14:10:46 -0000 1.5
--- sh64-media.cpu 21 May 2003 18:48:32 -0000
***************
*** 1,6 ****
; SuperH SHmedia instruction set description. -*- Scheme -*-
; Copyright (C) 2000, 2001 Red Hat, Inc.
! ; Copyright (C) 2002 SuperH Ltd
; This file is part of CGEN.
; See file COPYING.CGEN for details.
\f
--- 1,6 ----
; SuperH SHmedia instruction set description. -*- Scheme -*-
; Copyright (C) 2000, 2001 Red Hat, Inc.
! ; Copyright (C) 2002, 2003 SuperH Ltd
; This file is part of CGEN.
; See file COPYING.CGEN for details.
\f
***************
*** 1275,1290 ****
()
"msad.ubq $rm, $rn, $rd"
(+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
! (sequence ((DI acc))
! (set acc (abs DI (sub (subword QI rm 0) (subword QI rn 0))))
! (set acc (add DI acc (abs (sub (subword QI rm 1) (subword QI rn 1)))))
! (set acc (add DI acc (abs (sub (subword QI rm 2) (subword QI rn 2)))))
! (set acc (add DI acc (abs (sub (subword QI rm 3) (subword QI rn 3)))))
! (set acc (add DI acc (abs (sub (subword QI rm 4) (subword QI rn 4)))))
! (set acc (add DI acc (abs (sub (subword QI rm 5) (subword QI rn 5)))))
! (set acc (add DI acc (abs (sub (subword QI rm 6) (subword QI rn 6)))))
! (set acc (add DI acc (abs (sub (subword QI rm 7) (subword QI rn 7)))))
! (set rd (add rd acc))))
(define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
(dshmi mshaldsl "Multimedia saturating arithmetic left shift (long word)"
--- 1275,1298 ----
()
"msad.ubq $rm, $rn, $rd"
(+ (f-op 18) rm (f-ext 0) rn rd (f-rsvd 0))
! (sequence ((SI acc))
! (set acc (abs (sub (zext SI (subword QI rm 0))
! (zext SI (subword QI rn 0)))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 1))
! (zext SI (subword QI rn 1))))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 2))
! (zext SI (subword QI rn 2))))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 3))
! (zext SI (subword QI rn 3))))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 4))
! (zext SI (subword QI rn 4))))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 5))
! (zext SI (subword QI rn 5))))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 6))
! (zext SI (subword QI rn 6))))))
! (set acc (add acc (abs (sub (zext SI (subword QI rm 7))
! (zext SI (subword QI rn 7))))))
! (set rd (add rd (zext DI acc)))))
(define-pmacro (-mshaldsl arg) (saturate SI 32 (sll DI arg (and rn 31))))
(dshmi mshaldsl "Multimedia saturating arithmetic left shift (long word)"
^ permalink raw reply [flat|nested] 3+ messages in thread
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2003-05-21 16:35 RFA: sh64-media.cpu : msad.ubq has unsigned inputs Joern Rennecke
2003-05-21 17:11 ` Doug Evans
2003-05-21 18:50 ` Joern Rennecke
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