Banging my head against the dejagnu wall...

Banging my head against the dejagnu wall...

[Alan Lehotsky]

I'm nearly finished with my CGEN simulator and tool chain port.

Just a couple of things left.

The most annoying of which is trying to get the configuration of  
dejagnu for this simulator.

I would like it to use a  dejagnu/baseboards/MYCPU-sim.exp  in my  
source tree, but it seems determined to use ~/boards/standard.exp

In that file, if I have the single line

	verbose "enter: ~boards/standard.exp

we end up assembling and linking my allinsn.exp tests (the *.cgs  
files) and produce (for example) add.cgs.x.
The sim.log says we were unable to spawn add.cgs.x.    Which is not  
too surprising, since I haven't given it anything to work with.

If I change standard.exp to have

## Simple generic config file for the MYCPU.

verbose "enter: ~/boards/MYCPU"

load_generic_config "sim"

load_base_board_description "basic-sim"

set_board_info compiler "[find_gcc]"
set_board_info cflags "[newlib_include_flags] [libgloss_include_flags]"
set_board_info ldflags "[newlib_link_flags]"

# No linker script for this board.
set_board_info ldscript "-Tsim.ld";

# The simulator doesn't return exit statuses and we need to indicate  
this.
set_board_info needs_status_wrapper 1

set_board_info noargs 1
set_board_info gdb,nosignals 1
set_board_info gdb,cannot_call_functions 1

and do the "make check", the tests fail linking, saying:

/build/src/src/sim/testsuite/sim/MYCPU/add.cgs  -I/Users//build/src/ 
src/sim/testsuite/sim/MYCPU  -o add.cgs.o    (timeout = 300)
Executing on host: /Users//build/src/obj/ld/ld-new add.cgs.o    -L/ 
Users//build/src/obj/ld -Tsim.ld -o add.cgs.x    (timeout = 300)
/Users/build/src/obj/ld/ld-new: cannot open linker script file sim.ld:  
No such file or directory

linker exited with status 1
linker output is:
/Users/build/src/obj/ld/ld-new: cannot open linker script file sim.ld:  
No such file or directory


/Users//build/src/obj/ld/ld-new: cannot open linker script file  
sim.ld: No such file or directory

FAIL: MYCPU32 add.cgs (linking)

So, I must not want a linker script (since I know that the default  
linker commands like these test cases just fine...)

But when I change the

              set_board_info ldscript "";

I get spew from tcl and dejagnu that seems even less obvious......


l error sourcing /Users/build/src/src/sim/testsuite/sim/MYCPU/ 
allinsn.exp.
ERROR: too many nested evaluations (infinite loop?)
     while executing
"call_remote "" wait "host" 240"
     ("eval" body line 1)
     invoked from within
"eval call_remote \"\" wait \"$dest\" $timeout"
     (procedure "remote_wait" line 2)
     invoked from within
"remote_wait host $timeout"
     (procedure "sim_wait" line 2)
     invoked from within
"sim_wait "x86" 240"
     ("eval" body line 1)
     invoked from within
"eval ${try}_${proc} \"$dest\" $args"
     (procedure "call_remote" line 57)
     invoked from within
"call_remote "" wait "host" 240"
     ("eval" body line 1)
     invoked from within
"eval call_remote \"\" wait \"$dest\" $timeout"
     (procedure "remote_wait" line 2)
     invoked from within
"remote_wait host $timeout"
     (procedure "sim_wait" line 2)
     invoked from within
"sim_wait "x86" 240"
     ("eval" body line 1)
     invoked from within
"eval ${try}_${proc} \"$dest\" $args"


The allinsn.exp is exactly the file generated by the CGEN simulator  
test script, and it "works"
when it can't load the simulator.  Am I missing something from the  
standard.exp file to
make communicating with the simulator work?  Or is it more likely that  
I have done something
wrong in the simulator so that it won't talk with DejaGNU?

How can I test the basic connection between the simulator and runtest?

Thanks,