Simulating different models using a single simulator...

Simulating different models using a single simulator...

[Alan Lehotsky]

It appears that the 

	--model <name>

flag to the simulator allows one to indicate WHICH model of a cpu family is to be simulated.

What I'm wondering about is HOW to test the model selected within the (define-insn ...)?

What I'd like to do is conditionally test the model and execute slightly different code paths in
the simulator.  [There are only 6 instructions out of about 40 that are different between the two
models....

-- Al

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------------------------------------------------------------------------

		    Quality Software Management
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	     Language Design and Compiler Implementation

Re: Simulating different models using a single simulator...

[Frank Ch. Eigler]

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Hi -

alehotsky wrote:
: [...]
: What I'm wondering about is HOW to test the model selected
: within the (define-insn ...)?

You mean by means other than the MACH attribute assigned to the
instruction as a whole?  Within the insn semantics?  I don't know
if it works, but look for "current-mach" in cgen/cpu/sparccom.cpu.
(Another way would be to rely on a virtual operand whose getter
function identifies the machine.)

- FChE

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Simulating different models using a single simulator...

[Alan Lehotsky]

It appears that the 

	--model <name>

flag to the simulator allows one to indicate WHICH model of a cpu family is to be simulated.

What I'm wondering about is HOW to test the model selected within the (define-insn ...)?

What I'd like to do is conditionally test the model and execute slightly different code paths in
the simulator.  [There are only 6 instructions out of about 40 that are different between the two
models....

-- Al

-- 
------------------------------------------------------------------------

		    Quality Software Management
		http://home.earthlink.net/~qsmgmt
			apl@alum.mit.edu
			(978)287-0435 Voice
			(978)808-6836 Cell
			(978)287-0436 Fax

	Software Process Improvement and Management Consulting
	     Language Design and Compiler Implementation

Re: Simulating different models using a single simulator...

[Frank Ch. Eigler]

Hi -

alehotsky wrote:
: [...]
: What I'm wondering about is HOW to test the model selected
: within the (define-insn ...)?

You mean by means other than the MACH attribute assigned to the
instruction as a whole?  Within the insn semantics?  I don't know
if it works, but look for "current-mach" in cgen/cpu/sparccom.cpu.
(Another way would be to rely on a virtual operand whose getter
function identifies the machine.)

- FChE
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