From: "Frank Ch. Eigler" <fche@redhat.com>
To: David Carney <dfcarney@net-itech.com>
Cc: cgen@sources.redhat.com
Subject: Re: variable width instructions
Date: Fri, 20 Dec 2002 18:23:00 -0000 [thread overview]
Message-ID: <20021221022208.GA4353@redhat.com> (raw)
In-Reply-To: <200212201757.54789.dfcarney@net-itech.com>
Hi -
On Fri, Dec 20, 2002 at 05:57:54PM -0500, David Carney wrote:
> [...]
> My question is: how I should go about defining the instruction fields for
> this architecture? I.e. what value should I use for the "start" fields in
> "(define-ifield ...)" for the msb so that instruction fields are compatible
> for both 16-bit and (the effectively) 32-bit instructions (15 or 31) ?
There is a simple trick ...
> My confusion stems from observing the line:
> (dnf f-i32 "32 bit immediate" (SIGN-OPT) 16 32)
> in fr30.cpu. Doesn't the "16 32" denote that the start of the opcode is at
> bit 16, but the length is 32?
Yes - methinks it's used by 48-bit-long instructions.
The trick is that, for variable-length instruction sets, one should
start numbering bits from the left (opcode) end. (Set lsb0=#f.)
- FChE
next prev parent reply other threads:[~2002-12-21 2:23 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-12-20 14:59 David Carney
2002-12-20 18:23 ` Frank Ch. Eigler [this message]
2002-12-21 21:13 ` Doug Evans
2003-02-07 14:40 ` Again: " Manuel Kessler
2003-02-07 21:06 ` Jan Zizka
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