* [commit] fp conversion ops
@ 2010-01-25 4:04 Doug Evans
0 siblings, 0 replies; only message in thread
From: Doug Evans @ 2010-01-25 4:04 UTC (permalink / raw)
To: cgen
Hi.
fyi, I checked this in.
2010-01-24 Doug Evans <dje@sebabeach.org>
* desc-cpu.scm (cgen-desc.h): Don't print virtual enums.
* sid-cpu.scm (cgen-desc.h): Ditto.
* enum.scm (enum-builtin!): New function.
* read.scm (reader-install-builtin!): Call it.
* rtl-c.scm (s-convop): Delete, replaced with ...
(s-int-convop, s-float-convop): ... new fns.
(ext, zext, trunc): Update.
(fext, ftrunc, float, ufloat, fix, ufix): Update.
* rtx-funcs.scm (fext, ftrunc, float, ufloat, fix, ufix): New parameter
`how'.
* cpu/mep-fmax.cpu (fcvtsw): Update.
* cpu/sh.cpu (h-fsd, h-fmov): Update.
* doc/rtl.texi (float-convop): Update.
cpu/
* frv.cpu (floating-point-conversion): Update call to fp conv op.
(floating-point-dual-conversion, ne-floating-point-dual-conversion,
conditional-floating-point-conversion, ne-floating-point-conversion,
float-parallel-mul-add-double-semantics): Ditto.
Index: desc-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/desc-cpu.scm,v
retrieving revision 1.30
diff -u -p -r1.30 desc-cpu.scm
--- desc-cpu.scm 3 Nov 2009 16:24:01 -0000 1.30
+++ desc-cpu.scm 25 Jan 2010 01:05:56 -0000
@@ -976,8 +976,13 @@ init_tables (void)
; "MODEL_"
; (append (map list (map obj:name (current-model-list))) '((max))))
;"#define MAX_MODELS ((int) MODEL_MAX)\n\n"
- "/* Enums. */\n\n"
- (string-map gen-decl (current-enum-list))
+ (let ((enums (find (lambda (obj) (not (obj-has-attr? obj 'VIRTUAL)))
+ (current-enum-list))))
+ (if (null? enums)
+ ""
+ (string-list
+ "/* Enums. */\n\n"
+ (string-map gen-decl enums))))
"/* Attributes. */\n\n"
(string-map gen-decl (current-attr-list))
"/* Number of architecture variants. */\n"
Index: enum.scm
===================================================================
RCS file: /cvs/src/src/cgen/enum.scm,v
retrieving revision 1.11
diff -u -p -r1.11 enum.scm
--- enum.scm 5 Nov 2009 16:55:33 -0000 1.11
+++ enum.scm 25 Jan 2010 01:05:56 -0000
@@ -135,11 +135,13 @@
(parse-enum-vals context prefix vals)))
)
-; Read an enum description
-; This is the main routine for analyzing enums in the .cpu file.
-; CONTEXT is a <context> object for error messages.
-; ARG-LIST is an associative list of field name and field value.
-; /enum-parse is invoked to create the `enum' object.
+;; Read an enum description
+;; This is the main routine for analyzing enums in the .cpu file.
+;; CONTEXT is a <context> object for error messages.
+;; ARG-LIST is an associative list of field name and field value.
+;; /enum-parse is invoked to create the `enum' object.
+;;
+;; FIXME: Change (values ((foo 42) (bar 43))) to (values (foo 42) (bar 43)).
(define (/enum-read context . arg-list)
(let (
@@ -416,6 +418,24 @@ Define an instruction opcode enum, all a
*UNSPECIFIED*
)
+(define (enum-builtin!)
+ ;; Provide FPCONV-DEFAULT == 0 as an enum constant to use as the `how'
+ ;; parameter to the floating point conversion functions.
+ ;; ??? Add standard IEEE rounding modes?
+ (define-enum '(name fpconv-kind)
+ '(comment "builtin floating point conversion kinds")
+ '(attrs VIRTUAL) ;; let app provide def'n instead of each cpu's desc.h
+ '(prefix FPCONV-)
+ '(values ((DEFAULT 0)
+ (TIES-TO-EVEN 1)
+ (TIES-TO-AWAY 2)
+ (TOWARD-ZERO 3)
+ (TOWARD-POSITIVE 4)
+ (TOWARD-NEGATIVE 5))))
+
+ *UNSPECIFIED*
+)
+
(define (enum-finish!)
*UNSPECIFIED*
)
Index: read.scm
===================================================================
RCS file: /cvs/src/src/cgen/read.scm,v
retrieving revision 1.42
diff -u -p -r1.42 read.scm
--- read.scm 20 Jan 2010 05:56:59 -0000 1.42
+++ read.scm 25 Jan 2010 01:05:56 -0000
@@ -938,6 +938,7 @@ Define a preprocessor-style macro.
(define (reader-install-builtin!)
; The order here is important.
(attr-builtin!)
+ (enum-builtin!)
(mode-builtin!)
(ifield-builtin!)
(hardware-builtin!)
Index: rtl-c.scm
===================================================================
RCS file: /cvs/src/src/cgen/rtl-c.scm,v
retrieving revision 1.30
diff -u -p -r1.30 rtl-c.scm
--- rtl-c.scm 21 Jan 2010 07:56:41 -0000 1.30
+++ rtl-c.scm 25 Jan 2010 01:05:57 -0000
@@ -828,11 +828,11 @@
"))"))))
)
-; Mode conversions.
-; MODE is the mode name.
+;; Integer mode conversions.
+;; MODE is the mode name.
-(define (s-convop estate name mode s1)
- ; Get S1 in its normal mode, then convert.
+(define (s-int-convop estate name mode s1)
+ ;; Get S1 in its normal mode, then convert.
(let ((s (rtl-c-get estate DFLT s1))
(mode (mode:lookup mode)))
(if (and (not (estate-rtl-cover-fns? estate))
@@ -841,20 +841,35 @@
(string-append "((" (obj:str-name mode) ")"
" (" (obj:str-name (cx:mode s)) ")"
" (" (cx:c s) "))"))
- (if (or (mode-float? mode)
- (mode-float? (cx:mode s)))
- (cx:make mode
- (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
- (string-downcase name)
- (string-downcase (obj:str-name (rtx-sem-mode (cx:mode s))))
- (string-downcase (obj:str-name (rtx-sem-mode mode)))
- " (CGEN_CPU_FPU (current_cpu), "
- (cx:c s) ")"))
- (cx:make mode
- (string-append name
- (obj:str-name (rtx-sem-mode (cx:mode s)))
- (obj:str-name (rtx-sem-mode mode))
- " (" (cx:c s) ")")))))
+ (cx:make mode
+ (string-append name
+ (obj:str-name (rtx-sem-mode (cx:mode s)))
+ (obj:str-name (rtx-sem-mode mode))
+ " (" (cx:c s) ")"))))
+)
+
+;; Floating point mode conversions.
+;; MODE is the mode name.
+
+(define (s-float-convop estate name mode how1 s1)
+ ;; Get S1 in its normal mode, then convert.
+ (let ((s (rtl-c-get estate DFLT s1))
+ (mode (mode:lookup mode))
+ (how (rtl-c-get estate DFLT how1)))
+ (if (and (not (estate-rtl-cover-fns? estate))
+ (mode:host? (cx:mode s)))
+ (cx:make mode
+ (string-append "((" (obj:str-name mode) ")"
+ " (" (obj:str-name (cx:mode s)) ")"
+ " (" (cx:c s) "))"))
+ (cx:make mode
+ (string-append "CGEN_CPU_FPU (current_cpu)->ops->"
+ (string-downcase name)
+ (string-downcase (obj:str-name (rtx-sem-mode (cx:mode s))))
+ (string-downcase (obj:str-name (rtx-sem-mode mode)))
+ " (CGEN_CPU_FPU (current_cpu), "
+ (cx:c how) ", "
+ (cx:c s) ")"))))
)
; Compare SRC1 and SRC2 in mode MODE.
@@ -1790,31 +1805,32 @@
)
(define-fn ext (*estate* options mode s1)
- (s-convop *estate* "EXT" mode s1)
+ (s-int-convop *estate* "EXT" mode s1)
)
(define-fn zext (*estate* options mode s1)
- (s-convop *estate* "ZEXT" mode s1)
+ (s-int-convop *estate* "ZEXT" mode s1)
)
(define-fn trunc (*estate* options mode s1)
- (s-convop *estate* "TRUNC" mode s1)
+ (s-int-convop *estate* "TRUNC" mode s1)
)
-(define-fn fext (*estate* options mode s1)
- (s-convop *estate* "FEXT" mode s1)
+
+(define-fn fext (*estate* options mode how s1)
+ (s-float-convop *estate* "FEXT" mode how s1)
)
-(define-fn ftrunc (*estate* options mode s1)
- (s-convop *estate* "FTRUNC" mode s1)
+(define-fn ftrunc (*estate* options mode how s1)
+ (s-float-convop *estate* "FTRUNC" mode how s1)
)
-(define-fn float (*estate* options mode s1)
- (s-convop *estate* "FLOAT" mode s1)
+(define-fn float (*estate* options mode how s1)
+ (s-float-convop *estate* "FLOAT" mode how s1)
)
-(define-fn ufloat (*estate* options mode s1)
- (s-convop *estate* "UFLOAT" mode s1)
+(define-fn ufloat (*estate* options mode how s1)
+ (s-float-convop *estate* "UFLOAT" mode how s1)
)
-(define-fn fix (*estate* options mode s1)
- (s-convop *estate* "FIX" mode s1)
+(define-fn fix (*estate* options mode how s1)
+ (s-float-convop *estate* "FIX" mode how s1)
)
-(define-fn ufix (*estate* options mode s1)
- (s-convop *estate* "UFIX" mode s1)
+(define-fn ufix (*estate* options mode how s1)
+ (s-float-convop *estate* "UFIX" mode how s1)
)
(define-fn eq (*estate* options mode s1 s2)
Index: rtx-funcs.scm
===================================================================
RCS file: /cvs/src/src/cgen/rtx-funcs.scm,v
retrieving revision 1.19
diff -u -p -r1.19 rtx-funcs.scm
--- rtx-funcs.scm 21 Jan 2010 07:56:41 -0000 1.19
+++ rtx-funcs.scm 25 Jan 2010 01:05:57 -0000
@@ -941,7 +941,7 @@
; ...
;)
\f
-; Conversions.
+;; Integer conversions.
(drn (ext &options &mode s1)
#f
@@ -961,39 +961,42 @@
UNARY
#f
)
-(drn (fext &options &mode s1)
+
+;; Conversions involving floating point values.
+
+(drn (fext &options &mode how s1)
#f
- (OPTIONS ANYFLOATMODE RTX) (NA NA ANY)
+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
UNARY
#f
)
-(drn (ftrunc &options &mode s1)
+(drn (ftrunc &options &mode how s1)
#f
- (OPTIONS ANYFLOATMODE RTX) (NA NA ANY)
+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
UNARY
#f
)
-(drn (float &options &mode s1)
+(drn (float &options &mode how s1)
#f
- (OPTIONS ANYFLOATMODE RTX) (NA NA ANY)
+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
UNARY
#f
)
-(drn (ufloat &options &mode s1)
+(drn (ufloat &options &mode how s1)
#f
- (OPTIONS ANYFLOATMODE RTX) (NA NA ANY)
+ (OPTIONS ANYFLOATMODE RTX RTX) (NA NA INT ANY)
UNARY
#f
)
-(drn (fix &options &mode s1)
+(drn (fix &options &mode how s1)
#f
- (OPTIONS ANYINTMODE RTX) (NA NA ANY)
+ (OPTIONS ANYINTMODE RTX RTX) (NA NA INT ANY)
UNARY
#f
)
-(drn (ufix &options &mode s1)
+(drn (ufix &options &mode how s1)
#f
- (OPTIONS ANYINTMODE RTX) (NA NA ANY)
+ (OPTIONS ANYINTMODE RTX RTX) (NA NA INT ANY)
UNARY
#f
)
Index: sid-cpu.scm
===================================================================
RCS file: /cvs/src/src/cgen/sid-cpu.scm,v
retrieving revision 1.27
diff -u -p -r1.27 sid-cpu.scm
--- sid-cpu.scm 3 Nov 2009 16:24:02 -0000 1.27
+++ sid-cpu.scm 25 Jan 2010 01:05:57 -0000
@@ -85,8 +85,13 @@
namespace @arch@ {
\n"
- "// Enums.\n\n"
- (lambda () (string-map gen-decl (current-enum-list)))
+ (let ((enums (find (lambda (obj) (not (obj-has-attr? obj 'VIRTUAL)))
+ (current-enum-list))))
+ (if (null? enums)
+ ""
+ (string-list
+ "// Enums.\n\n"
+ (string-map gen-decl enums))))
/gen-attr-decls
/gen-insn-attr-decls
Index: cpu/mep-fmax.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/mep-fmax.cpu,v
retrieving revision 1.1
diff -u -p -r1.1 mep-fmax.cpu
--- cpu/mep-fmax.cpu 5 Feb 2007 19:46:38 -0000 1.1
+++ cpu/mep-fmax.cpu 25 Jan 2010 01:05:58 -0000
@@ -224,7 +224,7 @@
(fmax-conv fceilws #xE #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fceilws" fmax-FRn)))
(fmax-conv ffloorws #xF #x0 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_ffloorws" fmax-FRn)))
(fmax-conv fcvtws #x4 #x1 fmax-FRd-int fmax-FRn (set fmax-FRd-int (c-call SI "fmax_fcvtws" fmax-FRn)))
-(fmax-conv fcvtsw #x0 #x9 fmax-FRd fmax-FRn-int (set fmax-FRd (float SF fmax-FRn-int)))
+(fmax-conv fcvtsw #x0 #x9 fmax-FRd fmax-FRn-int (set fmax-FRd (float SF FPCONV-DEFAULT fmax-FRn-int)))
;------------------------------------------------------------------------------
; Comparisons
Index: cpu/sh.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/sh.cpu,v
retrieving revision 1.5
diff -u -p -r1.5 sh.cpu
--- cpu/sh.cpu 24 Aug 2009 06:46:16 -0000 1.5
+++ cpu/sh.cpu 25 Jan 2010 01:05:58 -0000
@@ -1249,11 +1249,11 @@
(type register DF (16))
(indices keyword "" (.map -build-freg-name (.iota 16)))
(get (index)
- (if DF prbit (reg h-drc index) (fext DF (reg h-fr index))))
+ (if DF prbit (reg h-drc index) (fext DF FPCONV-DEFAULT (reg h-fr index))))
(set (index newval)
(if prbit
(set (reg h-drc index) newval)
- (set (reg h-frc index) (ftrunc SF newval))))
+ (set (reg h-frc index) (ftrunc SF FPCONV-DEFAULT newval))))
)
(define-pmacro (even x) (eq (and x 1) 0))
@@ -1269,7 +1269,7 @@
(get (index)
(if DF (not szbit)
; single precision operation
- (fext DF (reg h-frc index))
+ (fext DF FPCONV-DEFAULT (reg h-frc index))
; double or extended operation
(if DF (extd index)
(reg h-xd (and index (inv 1)))
@@ -1277,7 +1277,7 @@
(set (index newval)
(if (not szbit)
; single precision operation
- (set (reg h-frc index) (ftrunc SF newval))
+ (set (reg h-frc index) (ftrunc SF FPCONV-DEFAULT newval))
; double or extended operation
(if (extd index)
(set (reg h-xd (and index (inv 1))) newval)
Index: doc/rtl.texi
===================================================================
RCS file: /cvs/src/src/cgen/doc/rtl.texi,v
retrieving revision 1.56
diff -u -p -r1.56 rtl.texi
--- doc/rtl.texi 23 Jan 2010 18:39:35 -0000 1.56
+++ doc/rtl.texi 25 Jan 2010 01:05:59 -0000
@@ -2777,9 +2777,19 @@ Truncate @samp{operand}, which must have
wider than @samp{mode}, which also must be an integer mode.
@end itemize
-@item (float-convop mode operand)
+@item (float-convop mode how operand)
Perform a mode->mode conversion operation involving a floating point value.
+Conversions involving floating point values need to specify
+how things like truncation will be performed, e.g., the rounding mode.
+@samp{how} is an rtx of mode @samp{INT} that specifies how the conversion
+will be performed. The interpretation of @samp{how} is architecture-dependent,
+except that a value of zero has a specific meaning:
+If a particular floating-point conversion can only be done one way,
+or if the conversion is to be done the ``default'' way, specify zero
+for @samp{how}.
+What ``the default way'' is is application-dependent.
+
@samp{float-convop} is one of:
@itemize @bullet
@@ -2805,6 +2815,23 @@ Convert @samp{operand}, which must have
to an unsigned integer of mode @samp{mode}.
@end itemize
+An enum is defined that specifies several predefined rounding modes.
+
+@smallexample
+(define-enum
+ (name fpconv-kind)
+ (comment "builtin floating point conversion kinds")
+ (attrs VIRTUAL) ;; let app provide def'n instead of each cpu's desc.h
+ (prefix FPCONV-)
+ (values ((DEFAULT 0)
+ (TIES-TO-EVEN 1)
+ (TIES-TO-AWAY 2)
+ (TOWARD-ZERO 3)
+ (TOWARD-POSITIVE 4)
+ (TOWARD-NEGATIVE 5)))
+)
+@end smallexample
+
@item (cmpop mode operand1 operand2)
Perform a comparison.
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