Re: contemplating CGEN for VLIW architecture

[John Healy <jhealy@redhat.com>]

As far as I know, the issue is not that cgen can't handle instructions longer than 32 bits, but that all
decodable bits must be within the top 32 bits.   If I understand what is written below correctly, each
element in the VLIW bundle will be 25 bits long so in that respect, I think you'll be ok.

John



matthew green wrote:

>    I'm evaluating a possible port to a VLIW microsequencer (256 bit microword, 25 fields
>    per micro-instruction).
>
>    I guess the good news is that there's ONLY one instruction format :-)
>
>    Any experience out there with such a wide instruction?  I remember seeing some patches a while back
>    to deal with instruction formats >> 32 bits.
>
> cgen supports > 32 bits.  dunno how _much_ further but i think it should
> work today...
>
>
>    I guess I'm also wondering if I can build an assembler that looks more like an expression language,
>    viz something like
>
>
>         REGA = REGB + REGC,  if R7 > R8 jump FAIL, REGZ=0x100;
>
>    where commas separate the various micro-ops, and the expressions are from the minimal set of + - ^ | &
>    separated by white space, etc.
>
>    Or is gas ONLY going to work with a traditional
>
>         OPCODE  OPERANDS,....
>
>    style?
>
> last i looked, the guts of the generated gas really seemed to assume
> the latter unfortunately.
>
> .mrg.