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From: Doug Evans <dje@sebabeach.org>
To: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: cgen@sources.redhat.com
Subject: Re: cgen -> opcodes problem
Date: Fri, 05 Mar 2010 22:15:00 -0000	[thread overview]
Message-ID: <4B918265.3060604@sebabeach.org> (raw)
In-Reply-To: <bc64b4641002260339j1d8fa2e5l1d348e9d7f52bd14@mail.gmail.com>

Dmitry Eremin-Solenikov wrote:
> On Wed, Feb 24, 2010 at 7:49 PM, Doug Evans <dje@sebabeach.org> wrote:
>   
>> Dmitry Eremin-Solenikov wrote:
>>     
>>> Hello all,
>>>
>>> Trying to continue this topic after a while.
>>>
>>> Doug Evans wrote:
>>>
>>>
>>>       
>>>> Dmitry Eremin-Solenikov wrote:
>>>>
>>>>         
>>>>> Hello all,
>>>>>
>>>>> I'm back to my m68hc08 binutils port done via cgen. Recently I've again
>>>>> stumbled upon a problem with instructions, whose base? length != ISA
>>>>> base length.
>>>>>
>>>>> E.g. in the attached stripped test case, the 'ttt' instruction either
>>>>> (should be assembled as 0x9E 0xF1) is misencoded as 0xsmth 0x00. Is
>>>>> this my fault? Or is this the expected behaviour and I should define
>>>>> f-seccode in some other way?
>>>>>
>>>>> Could you please help me?
>>>>>
>>>>>
>>>>>
>>>>>           
>>>> Hi.  cgen currently doesn't handle instructions with opcode bits beyond
>>>> the base insn size very well.  I have a sandbox with this fixed, but
>>>> it'll be awhile (month or more?) before it all gets checked in.
>>>>
>>>>         
>>> What is the current status of your sandbox? Do you have any patches
>>> available?
>>> Or any intermediate work? Can I/we do something to help you to clean this
>>> up?
>>>
>>> I'm currently trying to dig into ifmt-mask stuff, but it takes time...
>>>
>>>
>>>       
>>>> In the meantime, setting base-insn-bitsize to 16 may work.  [It *should*
>>>> work, but there may be attributes of your port I haven't taken into
>>>> account.]
>>>>
>>>>         
>>> Setting base-insn-bitsize to 16 break disassembler: it starts looking for
>>> 16-bit masks instead of 8-bit for each and every instruction, and this
>>> doesn't
>>> seem to work for lsb0 = #f port.
>>>
>>>
>>>       
>> Hi.  It's very slow going, mostly because this isn't my day job.  Sigh.
>>
>> It's easier to work with specific bugs though.  Can you send me your port to
>> try?  Complete sources for building binutils would be best (either as a
>> collection of patches or as a tarball I can ftp or some such).
>>     
>
> The port is maintained as a git tree at
> git://m68hc08-utils.git.sourceforge.net/gitroot/m68hc08-utils/m68hc08-utils
>
> You can browse code at
> http://m68hc08-utils.git.sourceforge.net/git/gitweb.cgi?p=m68hc08-utils/m68hc08-utils;a=summary
>
> If you'd prefer I can create a simple (2-3 insns) cut of the port,
> demonstrating the problem.
>
>   

Hi.
I've got a toolchain built and can run the gas testsuite.
Are these failures expected?
[just want to establish a baseline]

Running /misc/dje/gnu/m68hc08/myrepo/gas/testsuite/gas/m68k/all.exp ...
FAIL: cross-section branch
FAIL: PIC generation
FAIL: Incorrect Displacement too long error
FAIL: operands
FAIL: cas
FAIL: bitfield
FAIL: link
FAIL: fmoveml
FAIL: mcf-mov3q
FAIL: mcf-movsr
FAIL: mode5
FAIL: mcf-mac
FAIL: mcf-emac
FAIL: gas/m68k/mcf-coproc
FAIL: gas/m68k/mcf-fpu
FAIL: mcf-trap
FAIL: mcf-wdebug
FAIL: cpu32
FAIL: br-isaa.d
FAIL: br-isab.d
FAIL: br-isac.d
FAIL: ctrl-1.d
FAIL: ctrl-2.d
FAIL: 68000 operands

  reply	other threads:[~2010-03-05 22:15 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-12-27  8:10 Dmitry Eremin-Solenikov
2009-12-28 19:04 ` Doug Evans
2009-12-28 21:30   ` Dmitry Eremin-Solenikov
2009-12-28 21:57     ` Doug Evans
2009-12-28 22:59   ` Dmitry Eremin-Solenikov
2010-02-24 14:55   ` Dmitry Eremin-Solenikov
2010-02-24 16:49     ` Doug Evans
2010-02-26 11:39       ` Dmitry Eremin-Solenikov
2010-03-05 22:15         ` Doug Evans [this message]
2010-03-05 22:48           ` Dmitry Eremin-Solenikov
2010-03-05 22:51             ` Doug Evans

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