From: "Robert Cragie" <rcc@jennic.com>
To: <sid@sources.redhat.com>, <cgen@sources.redhat.com>
Subject: RE: [patch] Additional insn support for ARM7T
Date: Tue, 03 Sep 2002 04:29:00 -0000 [thread overview]
Message-ID: <NDBBLOIOMLKELOJBAPAGKEKECOAA.rcc@jennic.com> (raw)
In-Reply-To: <NDBBLOIOMLKELOJBAPAGGEJECOAA.rcc@jennic.com>
[-- Attachment #1: Type: text/plain, Size: 1202 bytes --]
I had trouble extracting the patch from the mail. Here is it is an an
attachment. To apply:
cd <sid-home>/src/cgen/cpu
patch -p0 < arm7.cpu.patch
cd <sid-home>/build/sid/component/cgen-cpu/arm7t
make cgen-all
cd ../../../
make all install
where <sid-home> is your SID home directory.
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
> -----Original Message-----
> From: sid-owner@sources.redhat.com
> [mailto:sid-owner@sources.redhat.com]On Behalf Of Robert Cragie
> Sent: 29 August 2002 11:24
> To: sid@sources.redhat.com; cgen@sources.redhat.com
> Subject: [patch] Additional insn support for ARM7T
>
>
> Whilst trying to get eCos to run on SID, I realised it was
> failing due to a
> LDMIA instruction not being emulated in the CPU simulator. Here is a patch
> to complete the combinations of LDM/STM instructions which are missing in
> CGEN for the ARM7. I have a feeling that it could be implemented more
> efficiently, but I am somewhat a newbie to Scheme, and also to
> contributing
> patches in the GNU manner, so please bear with me.
[snip]
[-- Attachment #2: arm7.cpu.patch --]
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Index: arm7.cpu
===================================================================
RCS file: /cvs/src/src/cgen/cpu/arm7.cpu,v
retrieving revision 1.1
diff -c -p -r1.1 arm7.cpu
*** arm7.cpu 5 Jul 2001 12:45:47 -0000 1.1
--- arm7.cpu 3 Sep 2002 11:13:39 -0000
***************
*** 1453,1458 ****
--- 1453,1473 ----
(set addr (sub addr 4)))
)
+ (define-pmacro (ldmda-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
+ (set addr (sub addr 4)))
+ )
+
+ (define-pmacro (ldmda-sw-action-r15 ignored)
+ (sequence ()
+ (set pc (mem WI addr))
+ (set addr (sub addr 4))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmda "Load multiple registers (postindex, decrement)"
()
"FIXME"
***************
*** 1479,1484 ****
--- 1494,1525 ----
)
)
+ (dnai ldmda-sw "Load multiple registers (postindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmda-sw-action-r15)
+ (multi-action 14 ldmda-sw-action)
+ (multi-action 13 ldmda-sw-action)
+ (multi-action 12 ldmda-sw-action)
+ (multi-action 11 ldmda-sw-action)
+ (multi-action 10 ldmda-sw-action)
+ (multi-action 9 ldmda-sw-action)
+ (multi-action 8 ldmda-sw-action)
+ (multi-action 7 ldmda-action)
+ (multi-action 6 ldmda-action)
+ (multi-action 5 ldmda-action)
+ (multi-action 4 ldmda-action)
+ (multi-action 3 ldmda-action)
+ (multi-action 2 ldmda-action)
+ (multi-action 1 ldmda-action)
+ (multi-action 0 ldmda-action)
+ )
+ )
+
(dnai ldmda-wb "Load multiple registers (postindex, decrement, writeback)"
()
"FIXME"
***************
*** 1505,1510 ****
--- 1546,1577 ----
(set rn addr))
)
+ (dnai ldmda-sw-wb "Load multiple registers (postindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmda-sw-action-r15)
+ (multi-action 14 ldmda-sw-action)
+ (multi-action 13 ldmda-sw-action)
+ (multi-action 12 ldmda-sw-action)
+ (multi-action 11 ldmda-sw-action)
+ (multi-action 10 ldmda-sw-action)
+ (multi-action 9 ldmda-sw-action)
+ (multi-action 8 ldmda-sw-action)
+ (multi-action 7 ldmda-action)
+ (multi-action 6 ldmda-action)
+ (multi-action 5 ldmda-action)
+ (multi-action 4 ldmda-action)
+ (multi-action 3 ldmda-action)
+ (multi-action 2 ldmda-action)
+ (multi-action 1 ldmda-action)
+ (multi-action 0 ldmda-action)
+ (set rn addr))
+ )
+
(define-pmacro (ldmib-action bit-num)
(sequence ()
(set addr (add addr 4))
***************
*** 1517,1522 ****
--- 1584,1604 ----
(set pc (mem WI addr)))
)
+ (define-pmacro (ldmib-sw-action bit-num)
+ (sequence ()
+ (set addr (add addr 4))
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
+ )
+
+ (define-pmacro (ldmib-sw-action-r15 ignored)
+ (sequence ()
+ (set addr (add addr 4))
+ (set pc (mem WI addr))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmib "Load multiple register (preindex, increment)"
()
"FIXME"
***************
*** 1542,1547 ****
--- 1624,1654 ----
(multi-action 15 ldmib-action-r15))
)
+ (dnai ldmib-sw "Load multiple register (preindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmib-action)
+ (multi-action 1 ldmib-action)
+ (multi-action 2 ldmib-action)
+ (multi-action 3 ldmib-action)
+ (multi-action 4 ldmib-action)
+ (multi-action 5 ldmib-action)
+ (multi-action 6 ldmib-action)
+ (multi-action 7 ldmib-action)
+ (multi-action 8 ldmib-sw-action)
+ (multi-action 9 ldmib-sw-action)
+ (multi-action 10 ldmib-sw-action)
+ (multi-action 11 ldmib-sw-action)
+ (multi-action 12 ldmib-sw-action)
+ (multi-action 13 ldmib-sw-action)
+ (multi-action 14 ldmib-sw-action)
+ (multi-action 15 ldmib-sw-action-r15))
+ )
+
(dnai ldmib-wb "Load multiple registers (preindex, increment, writeback)"
()
"FIXME"
***************
*** 1568,1573 ****
--- 1675,1706 ----
(set rn addr))
)
+ (dnai ldmib-sw-wb "Load multiple registers (preindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmib-action)
+ (multi-action 1 ldmib-action)
+ (multi-action 2 ldmib-action)
+ (multi-action 3 ldmib-action)
+ (multi-action 4 ldmib-action)
+ (multi-action 5 ldmib-action)
+ (multi-action 6 ldmib-action)
+ (multi-action 7 ldmib-action)
+ (multi-action 8 ldmib-sw-action)
+ (multi-action 9 ldmib-sw-action)
+ (multi-action 10 ldmib-sw-action)
+ (multi-action 11 ldmib-sw-action)
+ (multi-action 12 ldmib-sw-action)
+ (multi-action 13 ldmib-sw-action)
+ (multi-action 14 ldmib-sw-action)
+ (multi-action 15 ldmib-sw-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (ldmia-action bit-num)
(sequence ()
(set (reg WI h-gr bit-num) (mem WI addr))
***************
*** 1580,1585 ****
--- 1713,1733 ----
(set addr (add addr 4)))
)
+ (define-pmacro (ldmia-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr)))
+ (set addr (add addr 4)))
+ )
+
+ (define-pmacro (ldmia-sw-action-r15 ignored)
+ (sequence ()
+ (set pc (mem WI addr))
+ (set addr (add addr 4))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmia "Load multiple registers (postindex, increment)"
()
"FIXME"
***************
*** 1605,1610 ****
--- 1753,1783 ----
(multi-action 15 ldmia-action-r15))
)
+ (dnai ldmia-sw "Load multiple registers (postindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmia-action)
+ (multi-action 1 ldmia-action)
+ (multi-action 2 ldmia-action)
+ (multi-action 3 ldmia-action)
+ (multi-action 4 ldmia-action)
+ (multi-action 5 ldmia-action)
+ (multi-action 6 ldmia-action)
+ (multi-action 7 ldmia-action)
+ (multi-action 8 ldmia-sw-action)
+ (multi-action 9 ldmia-sw-action)
+ (multi-action 10 ldmia-sw-action)
+ (multi-action 11 ldmia-sw-action)
+ (multi-action 12 ldmia-sw-action)
+ (multi-action 13 ldmia-sw-action)
+ (multi-action 14 ldmia-sw-action)
+ (multi-action 15 ldmia-sw-action-r15))
+ )
+
(dnai ldmia-wb "Load multiple registers (postindex, increment, writeback)"
()
"FIXME"
***************
*** 1631,1636 ****
--- 1804,1835 ----
(set rn addr))
)
+ (dnai ldmia-sw-wb "Load multiple registers (postindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 ldmia-action)
+ (multi-action 1 ldmia-action)
+ (multi-action 2 ldmia-action)
+ (multi-action 3 ldmia-action)
+ (multi-action 4 ldmia-action)
+ (multi-action 5 ldmia-action)
+ (multi-action 6 ldmia-action)
+ (multi-action 7 ldmia-action)
+ (multi-action 8 ldmia-sw-action)
+ (multi-action 9 ldmia-sw-action)
+ (multi-action 10 ldmia-sw-action)
+ (multi-action 11 ldmia-sw-action)
+ (multi-action 12 ldmia-sw-action)
+ (multi-action 13 ldmia-sw-action)
+ (multi-action 14 ldmia-sw-action)
+ (multi-action 15 ldmia-sw-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (ldmdb-action bit-num)
(sequence ()
(set addr (sub addr 4))
***************
*** 1643,1648 ****
--- 1842,1862 ----
(set pc (mem WI addr)))
)
+ (define-pmacro (ldmdb-sw-action bit-num)
+ (sequence ()
+ (set addr (sub addr 4))
+ (if (and reglist (sll 1 15))
+ (set (reg WI h-gr bit-num) (mem WI addr))
+ (set (reg WI h-gr-usr (sub bit-num 8)) (mem WI addr))))
+ )
+
+ (define-pmacro (ldmdb-sw-action-r15 ignored)
+ (sequence ()
+ (set addr (sub addr 4))
+ (set pc (mem WI addr))
+ (set (reg h-cpsr) (reg h-spsr)))
+ )
+
(dnai ldmdb "Load multiple registers (preindex, decrement)"
()
"ldm$cond .."
***************
*** 1668,1673 ****
--- 1882,1912 ----
(multi-action 0 ldmdb-action))
)
+ (dnai ldmdb-sw "Load multiple registers (preindex, decrement, switch)"
+ ()
+ "ldm$cond .."
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmdb-sw-action-r15)
+ (multi-action 14 ldmdb-sw-action)
+ (multi-action 13 ldmdb-sw-action)
+ (multi-action 12 ldmdb-sw-action)
+ (multi-action 11 ldmdb-sw-action)
+ (multi-action 10 ldmdb-sw-action)
+ (multi-action 9 ldmdb-sw-action)
+ (multi-action 8 ldmdb-sw-action)
+ (multi-action 7 ldmdb-action)
+ (multi-action 6 ldmdb-action)
+ (multi-action 5 ldmdb-action)
+ (multi-action 4 ldmdb-action)
+ (multi-action 3 ldmdb-action)
+ (multi-action 2 ldmdb-action)
+ (multi-action 1 ldmdb-action)
+ (multi-action 0 ldmdb-action))
+ )
+
(dnai ldmdb-wb "Load multiple registers (preindex, decrement, writeback)"
()
"FIXME"
***************
*** 1694,1705 ****
--- 1933,1978 ----
(set rn addr))
)
+ (dnai ldmdb-sw-wb "Load multiple registers (preindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 1) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 ldmdb-sw-action-r15)
+ (multi-action 14 ldmdb-sw-action)
+ (multi-action 13 ldmdb-sw-action)
+ (multi-action 12 ldmdb-sw-action)
+ (multi-action 11 ldmdb-sw-action)
+ (multi-action 10 ldmdb-sw-action)
+ (multi-action 9 ldmdb-sw-action)
+ (multi-action 8 ldmdb-sw-action)
+ (multi-action 7 ldmdb-action)
+ (multi-action 6 ldmdb-action)
+ (multi-action 5 ldmdb-action)
+ (multi-action 4 ldmdb-action)
+ (multi-action 3 ldmdb-action)
+ (multi-action 2 ldmdb-action)
+ (multi-action 1 ldmdb-action)
+ (multi-action 0 ldmdb-action)
+ (set rn addr))
+ )
+
(define-pmacro (stmdb-action bit-num)
(sequence ()
(set addr (sub addr 4))
(set (mem WI addr) (reg WI h-gr bit-num)))
)
+ (define-pmacro (stmdb-sw-action bit-num)
+ (sequence ()
+ (set addr (sub addr 4))
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
+ )
+
(define-pmacro (stmdb-action-r15 ignore)
(sequence ()
(set addr (sub addr 4))
***************
*** 1731,1736 ****
--- 2004,2034 ----
(multi-action 0 stmdb-action))
)
+ (dnai stmdb-sw "Store multiple registers (preindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmdb-action-r15)
+ (multi-action 14 stmdb-sw-action)
+ (multi-action 13 stmdb-sw-action)
+ (multi-action 12 stmdb-sw-action)
+ (multi-action 11 stmdb-sw-action)
+ (multi-action 10 stmdb-sw-action)
+ (multi-action 9 stmdb-sw-action)
+ (multi-action 8 stmdb-sw-action)
+ (multi-action 7 stmdb-action)
+ (multi-action 6 stmdb-action)
+ (multi-action 5 stmdb-action)
+ (multi-action 4 stmdb-action)
+ (multi-action 3 stmdb-action)
+ (multi-action 2 stmdb-action)
+ (multi-action 1 stmdb-action)
+ (multi-action 0 stmdb-action))
+ )
+
(dnai stmdb-wb "Store multiple registers (preindex, decrement, writeback)"
()
"FIXME"
***************
*** 1757,1768 ****
--- 2055,2100 ----
(set rn addr))
)
+ (dnai stmdb-sw-wb "Store multiple registers (preindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmdb-action-r15)
+ (multi-action 14 stmdb-sw-action)
+ (multi-action 13 stmdb-sw-action)
+ (multi-action 12 stmdb-sw-action)
+ (multi-action 11 stmdb-sw-action)
+ (multi-action 10 stmdb-sw-action)
+ (multi-action 9 stmdb-sw-action)
+ (multi-action 8 stmdb-sw-action)
+ (multi-action 7 stmdb-action)
+ (multi-action 6 stmdb-action)
+ (multi-action 5 stmdb-action)
+ (multi-action 4 stmdb-action)
+ (multi-action 3 stmdb-action)
+ (multi-action 2 stmdb-action)
+ (multi-action 1 stmdb-action)
+ (multi-action 0 stmdb-action)
+ (set rn addr))
+ )
+
(define-pmacro (stmib-action bit-num)
(sequence ()
(set addr (add addr 4))
(set (mem WI addr) (reg WI h-gr bit-num)))
)
+ (define-pmacro (stmib-sw-action bit-num)
+ (sequence ()
+ (set addr (add addr 4))
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8)))))
+ )
+
(define-pmacro (stmib-action-r15 ignore)
(sequence ()
(set addr (add addr 4))
***************
*** 1794,1799 ****
--- 2126,2156 ----
(multi-action 15 stmib-action-r15))
)
+ (dnai stmib-sw "Store multiple registers (preindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmib-action)
+ (multi-action 1 stmib-action)
+ (multi-action 2 stmib-action)
+ (multi-action 3 stmib-action)
+ (multi-action 4 stmib-action)
+ (multi-action 5 stmib-action)
+ (multi-action 6 stmib-action)
+ (multi-action 7 stmib-action)
+ (multi-action 8 stmib-sw-action)
+ (multi-action 9 stmib-sw-action)
+ (multi-action 10 stmib-sw-action)
+ (multi-action 11 stmib-sw-action)
+ (multi-action 12 stmib-sw-action)
+ (multi-action 13 stmib-sw-action)
+ (multi-action 14 stmib-sw-action)
+ (multi-action 15 stmib-action-r15))
+ )
+
(dnai stmib-wb "Store multiple registers (preindex, increment, writeback)"
()
"FIXME"
***************
*** 1820,1831 ****
--- 2177,2222 ----
(set rn addr))
)
+ (dnai stmib-sw-wb "Store multiple registers (preindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 1) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmib-action)
+ (multi-action 1 stmib-action)
+ (multi-action 2 stmib-action)
+ (multi-action 3 stmib-action)
+ (multi-action 4 stmib-action)
+ (multi-action 5 stmib-action)
+ (multi-action 6 stmib-action)
+ (multi-action 7 stmib-action)
+ (multi-action 8 stmib-sw-action)
+ (multi-action 9 stmib-sw-action)
+ (multi-action 10 stmib-sw-action)
+ (multi-action 11 stmib-sw-action)
+ (multi-action 12 stmib-sw-action)
+ (multi-action 13 stmib-sw-action)
+ (multi-action 14 stmib-sw-action)
+ (multi-action 15 stmib-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (stmia-action bit-num)
(sequence ()
(set (mem WI addr) (reg WI h-gr bit-num))
(set addr (add addr 4)))
)
+ (define-pmacro (stmia-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
+ (set addr (add addr 4)))
+ )
+
(define-pmacro (stmia-action-r15 ignore)
(sequence ()
(set (mem WI addr) (add (reg WI h-gr 15) 4))
***************
*** 1857,1862 ****
--- 2248,2278 ----
(multi-action 15 stmia-action-r15))
)
+ (dnai stmia-sw "Store multiple registers (postindex, increment, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmia-action)
+ (multi-action 1 stmia-action)
+ (multi-action 2 stmia-action)
+ (multi-action 3 stmia-action)
+ (multi-action 4 stmia-action)
+ (multi-action 5 stmia-action)
+ (multi-action 6 stmia-action)
+ (multi-action 7 stmia-action)
+ (multi-action 8 stmia-sw-action)
+ (multi-action 9 stmia-sw-action)
+ (multi-action 10 stmia-sw-action)
+ (multi-action 11 stmia-sw-action)
+ (multi-action 12 stmia-sw-action)
+ (multi-action 13 stmia-sw-action)
+ (multi-action 14 stmia-sw-action)
+ (multi-action 15 stmia-action-r15))
+ )
+
(dnai stmia-wb "Store multiple registers (postindex, increment, writeback)"
()
"FIXME"
***************
*** 1883,1894 ****
--- 2299,2344 ----
(set rn addr))
)
+ (dnai stmia-sw-wb "Store multiple registers (postindex, increment, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 1) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 0 stmia-action)
+ (multi-action 1 stmia-action)
+ (multi-action 2 stmia-action)
+ (multi-action 3 stmia-action)
+ (multi-action 4 stmia-action)
+ (multi-action 5 stmia-action)
+ (multi-action 6 stmia-action)
+ (multi-action 7 stmia-action)
+ (multi-action 8 stmia-sw-action)
+ (multi-action 9 stmia-sw-action)
+ (multi-action 10 stmia-sw-action)
+ (multi-action 11 stmia-sw-action)
+ (multi-action 12 stmia-sw-action)
+ (multi-action 13 stmia-sw-action)
+ (multi-action 14 stmia-sw-action)
+ (multi-action 15 stmia-action-r15)
+ (set rn addr))
+ )
+
(define-pmacro (stmda-action-r15 ignore)
(sequence ()
(set (mem WI addr) (add (reg WI h-gr 15) 4))
(set addr (sub addr 4)))
)
+ (define-pmacro (stmda-sw-action bit-num)
+ (sequence ()
+ (if (and reglist (sll 1 15))
+ (set (mem WI addr) (reg WI h-gr bit-num))
+ (set (mem WI addr) (reg WI h-gr-usr (sub bit-num 8))))
+ (set addr (sub addr 4)))
+ )
+
(define-pmacro (stmda-action bit-num)
(sequence ()
(set (mem WI addr) (reg WI h-gr bit-num))
***************
*** 1920,1925 ****
--- 2370,2400 ----
(multi-action 0 stmda-action))
)
+ (dnai stmda-sw "Store multiple registers (postindex, decrement, switch)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 0) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmda-action-r15)
+ (multi-action 14 stmda-sw-action)
+ (multi-action 13 stmda-sw-action)
+ (multi-action 12 stmda-sw-action)
+ (multi-action 11 stmda-sw-action)
+ (multi-action 10 stmda-sw-action)
+ (multi-action 9 stmda-sw-action)
+ (multi-action 8 stmda-sw-action)
+ (multi-action 7 stmda-action)
+ (multi-action 6 stmda-action)
+ (multi-action 5 stmda-action)
+ (multi-action 4 stmda-action)
+ (multi-action 3 stmda-action)
+ (multi-action 2 stmda-action)
+ (multi-action 1 stmda-action)
+ (multi-action 0 stmda-action))
+ )
+
(dnai stmda-wb "Store multiple registers (postindex, decrement, writeback)"
()
"FIXME"
***************
*** 1946,1951 ****
--- 2421,2451 ----
(set rn addr))
)
+ (dnai stmda-sw-wb "Store multiple registers (postindex, decrement, switch, writeback)"
+ ()
+ "FIXME"
+ (+ cond (f-op3 4) (f-preindex? 0) (f-up-down 0) (f-load-psr? 1)
+ (f-write-back? 1) (f-load? 0) rn reglist)
+ (sequence ((WI addr))
+ (set addr rn)
+ (multi-action 15 stmda-action-r15)
+ (multi-action 14 stmda-sw-action)
+ (multi-action 13 stmda-sw-action)
+ (multi-action 12 stmda-sw-action)
+ (multi-action 11 stmda-sw-action)
+ (multi-action 10 stmda-sw-action)
+ (multi-action 9 stmda-sw-action)
+ (multi-action 8 stmda-sw-action)
+ (multi-action 7 stmda-action)
+ (multi-action 6 stmda-action)
+ (multi-action 5 stmda-action)
+ (multi-action 4 stmda-action)
+ (multi-action 3 stmda-action)
+ (multi-action 2 stmda-action)
+ (multi-action 1 stmda-action)
+ (multi-action 0 stmda-action)
+ (set rn addr))
+ )
\f
; Coprocessor instructions.
; Currently not implemented, so omit these, such that we take the
next prev parent reply other threads:[~2002-09-03 11:29 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-08-29 3:24 Robert Cragie
2002-09-03 4:29 ` Robert Cragie [this message]
2002-09-07 7:58 ` Frank Ch. Eigler
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