[Bug 1001456] HAL misses Interrupt Clear-Pending Registers handling: wasted processing power

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--- Comment #2 from Bernard Fouché <bernard.fouche@kuantic.com> 2012-01-24 16:10:54 GMT ---
Some ASCII art to try to better explain the issue:

HW |  E1      E2
---|----------------------------
ISR|    I1          I2
---|----------------------------
DSR|              D1          D2

E1: a 1st event occurs

I1: ISR related to E1 triggered, ISR masks interrupt and asks
for a DSR run.

E2: a 2nd event occurs but since interrupt is masked, pending
interrupt register bit is set and ISR is not run.

D1: DSR processes everything it can (for instance it empties a RX
FIFO). DSR unmasks interrupt at the end of processing.

I2: because E2 occurred while interrupt was masked and since
pending interrupt bit is set, I2 now occurs.

D2: DSR runs, and find no work to do because D1 did all the work.

In this example, there were 1 ISR (I2) and 1 DSR (D2) that ran for
nothing.

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Subject: [Bug 1001456] HAL misses Interrupt Clear-Pending Registers handling:
 wasted processing power
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--- Comment #2 from Bernard Fouché <bernard.fouche@kuantic.com> 2012-01-24 16:10:54 GMT ---
Some ASCII art to try to better explain the issue:

HW |  E1      E2
---|----------------------------
ISR|    I1          I2
---|----------------------------
DSR|              D1          D2

E1: a 1st event occurs

I1: ISR related to E1 triggered, ISR masks interrupt and asks
for a DSR run.

E2: a 2nd event occurs but since interrupt is masked, pending
interrupt register bit is set and ISR is not run.

D1: DSR processes everything it can (for instance it empties a RX
FIFO). DSR unmasks interrupt at the end of processing.

I2: because E2 occurred while interrupt was masked and since
pending interrupt bit is set, I2 now occurs.

D2: DSR runs, and find no work to do because D1 did all the work.

In this example, there were 1 ISR (I2) and 1 DSR (D2) that ran for
nothing.

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Subject: [Bug 1001453] CAN IO package: wider flags field, flag to report
 return to 'error active' mode
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--- Comment #9 from Bernard Fouché <bernard.fouche@kuantic.com> 2012-01-24 19:25:16 GMT ---
(In reply to comment #8)
>
> So far only one comment.
> 
> Still try to be very careful when planning to change generic CAN I/O
> API. There is not only a dependence (LPC2XXX).
> 
>   % ecosconfig list | grep DEVS_CAN
>   Package CYGPKG_DEVS_CAN_AT91SAM7 (AT91SAM7 CAN device drivers):
>   Package CYGPKG_DEVS_CAN_LOOP (Loop CAN device drivers):
>   Package CYGPKG_DEVS_CAN_LPC2XXX (LPC2xxx CAN device drivers):
>   Package CYGPKG_DEVS_CAN_MCF52xx_FLEXCAN (MCF52xx FlexCAN device drivers):
> 
> Sergei

I've seen this. The only change that impacts other packages is the
CYGNUM_CAN_EVENT_OVERRUN_RX event.

Today this event has two meaning: 1) because the eCos RX queue is overwritten
by a new message 2) a hardware related overrun. So when the event occurs, one
can't know if it's because the receive queue is undersized (or the application
is to slow to empty the queue), or if the driver isn't fast enough to process
CAN bus activity, which is very different. So I've made a
CYGNUM_CAN_EVENT_OVERRUN_RX_HW event for the second case.

I've modified the AT91SAM7 and MCF52XX driver accordingly (one line is patched
just to change the name of the event since this event is generated only in one
place. Since all CAN drivers have been written by Uwe Kindler and follow the
same logic it's easy to understand the code from a driver to the other).

LPC2XXX driver I'll patch without my other changes, so every driver will be
kept coherent with the CAN IO package.

The loop driver does not require any change since it does not handle hardware.

Everything else I added is supported by older driver since it's just a matter
of API convention defaulting to the set of features supported by older drivers.

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Ilija Kocho <ilijak@siva.com.mk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|                            |CURRENTRELEASE

--- Comment #11 from Ilija Kocho <ilijak@siva.com.mk> 2012-01-24 19:46:53 GMT ---
Checked in.

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