MIPS 24K HAL for eCos...?

MIPS 24K HAL for eCos...?

[Lars Povlsen]

Hi list!

I will probably be faced with porting an existing eCos application to a
MIPS 24K-based platform, and noted that the current CVS version only has
specific support for the 4K processor.

Has anybody used (or attempted to use) eCos on a 24K processor? Does
anyone have any estimates/guidance on the depth of task?

The instructions set should be more or less identical (being MIPS32),
but for sure there are for sure subtle differences...

Also, eCosPro boasts 4Kc support on the MALTA boards, but nothing
(listed) for 24K...

Any information is welcome!

Sincerely

Lars Povlsen
Principal Software Engineer
Vitesse Semiconductor

Re: MIPS 24K HAL for eCos...?

[Daniel Helgason]

On Thu, 2008-12-18 at 13:49 +0100, Lars Povlsen wrote:
> Hi list!
> 
> I will probably be faced with porting an existing eCos application to a
> MIPS 24K-based platform, and noted that the current CVS version only has
> specific support for the 4K processor.
> 
> Has anybody used (or attempted to use) eCos on a 24K processor? Does
> anyone have any estimates/guidance on the depth of task?
> 
> The instructions set should be more or less identical (being MIPS32),
> but for sure there are for sure subtle differences...
> 
> Also, eCosPro boasts 4Kc support on the MALTA boards, but nothing
> (listed) for 24K...
> 
> Any information is welcome!
> 
> Sincerely
> 
> Lars Povlsen
> Principal Software Engineer
> Vitesse Semiconductor
> 

The 24K series is a MIPS32r2 (release 2) core. Release 2 adds some
instructions and adds some different interrupt handling features but
retains compatibility with the original MIPS32 release. Nothing was
taken away. There should not be any subtle differences in the
instruction set for any MIPS core purporting to be MIPS32 compatible!

Some of the optional MIPS32r2 interrupt related features don't fit well
with the eCos interrupt abstraction scheme. Generally, there is no
advantage to using alternate register bank(s) or vectored interrupts in
eCos.

It depends on the both the MIPS core and the rest of the SoC/system as
to which MIPS32r2 interrupt mode you can choose or even if you are given
a choice at all. I think this area is where most of your porting efforts
will be.

-- 
+---------------------------------------------
| Daniel Helgason <dhelgason@shaw.ca>