[ECOS] SMC2 serial driver....problems!?!

[ECOS] SMC2 serial driver....problems!?!

[Daniel Lind]

Hi,
I'm trying to make the serial IO device ser2 for MBX 860 board,
PowerPC,  to run.

First I just enable PowerPC QUICC/SMC serial port 2.......
Ok, yes it runs, but if I make a loop where I'm sending a message of 5
bytes over and over again it stops working after 55 sendings of the
message.
I have tried to change the delay between the sending of the message ( 1
second) and I have change my baudrate in every direction, but its just
the same....stops running after 55 sendings.When I change the length of
my message to on character, 1 byte, I can send 259 times.

The interrupts shall be generated after the buffer is filled and
complete. I send a message that is 32 bytes....but no! ISR and DSR are
never called. (CPM interrupt disabled......)

Ok...I set buffersize to zero and then I shall not have any interrupts.

I change the buffert size,
CYGNUM_IO_SERIAL_POWERPC_QUICC_SMC_SMC2_BUFSIZE, and set this to 0. Now
the message with 5 bytes is send 12 times. If I change the buffer size
to 4000 my message is sent 803 time.

Ok...the first time when the buffer is of size 0 I can send 60 bytes
totally, 12*5 = 60. The output buffer size is 16*4 butes, ie 64 bytes.
It looks like I can send 60 bytes and after that the buffer can't
contain my next message because it's 5 bytes and the free buffer space
is 4 bytes. Is this a coincidence?

To me it all looks like no buffer is cleaned up......

*****Where shall the buffers be cleaned up and when? (Both of
them!)********

Debugging my target tells me that ISR and DSR are never called..
My thought is then that there is some problem with the interrupts so I
enable CPM interrupts. When I enable CPM interrupts the interrupts
doesn't work. The message "ASSERT FAIL: <2>var_intr.c   [219]
hal_arbitration_isr_cpm() Interrupt not handled". But I think it's good
that this function is called at least.

*****Can I have some initialization problem with the interrupt from
SMC2?
I have checked the initialization and everything seems ok...

*****How come that this interrupt is handled when CPM interrupts is not
enabled?

*****Shall CPM interrupts be enabled or disabled?

Is there something else I must enable in eCos configuration when I'm
using interrupts?
Now I enable the following:
-Use separate stack for interrupts,
CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK = true
-Interrupt stack size 4096, CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE =
4096
-Save minimum context on interrupt,
CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT = true

I have also tried to enable "chain all interrupts together", ie
CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN = true and nothing is working......

/Daniel Lind

Re: [ECOS] SMC2 serial driver....problems!?!

[Jesper Skov]

>>>>> "Daniel" == Daniel Lind <daniel.lind@sth.frontec.se> writes:

Daniel> Hi, I'm trying to make the serial IO device ser2 for MBX 860
Daniel> board, PowerPC, to run.

Daniel, I wish I had the time to dive into this - but at the moment I
don't, and I don't want you to be under the impression that I'm
working on this in silence (I'm not).

All I can do is suggest you get the 860 manual from Motorola (either
in PDF format, or order the dead-tree edition, which was free last
time I checked), and read up on the beast that is QUICC.

Jesper

Re: [ECOS] SMC2 serial driver....problems!?!

[Jesper Skov]

For the benefit of the rest of the list:

Daniel> Hi,

Daniel> I solved the problems yesterday and I had to add just one
Daniel> little thing in the ISR for the device driver. So my ISR in
Daniel> quicc_smc_serial.c looks like this....

Ah, glad to hear that.

Daniel> // Serial I/O - low level interrupt handler (ISR)
Daniel> static cyg_uint32
Daniel> quicc_smc_serial_ISR(cyg_vector_t vector, cyg_addrword_t data)
Daniel> {
Daniel>     serial_channel *chan = (serial_channel *)data;
Daniel>     quicc_smc_serial_info *smc_chan = (quicc_smc_serial_info
Daniel> *)chan->dev_priv;
Daniel>     cyg_drv_interrupt_mask(smc_chan->int_num);
Daniel>     return (CYG_ISR_HANDLED|CYG_ISR_CALL_DSR);  // Cause DSR to be run
Daniel> }

Daniel> I had to add CYG_ISR_HANDLED.

Jesper