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From: Marcel Ovidiu Achim <marcel.achim@ovidius-ib.de>
To: Andrew Lunn <andrew@lunn.ch>
Cc: ecos-discuss@ecos.sourceware.org,  ecos-discuss@sources.redhat.com
Subject: Re: [ECOS] Re: unaligned half-word flash memory access on a EB55/AT91
Date: Mon, 09 May 2005 07:45:00 -0000	[thread overview]
Message-ID: <427D57AE.3030500@ovidius-ib.de> (raw)
Message-ID: <20050509074500.k_YZGYXtYYVn1-TNGyJkKgCuH7quFJxY-J-WlpxRRMM@z> (raw)
In-Reply-To: <20050507161853.GM31731@lunn.ch>

Andrew Lunn schrieb:

>On Sat, May 07, 2005 at 10:26:57AM +0200, Marcel Ovidiu Achim wrote:
>  
>
>>Andrew Lunn schrieb:
>>
>>    
>>
>>>On Fri, May 06, 2005 at 08:51:17PM +0200, Marcel Ovidiu Achim wrote:
>>>
>>>
>>>      
>>>
>>>>Hi all,
>>>>
>>>>I am using eCos on an Atmel EB55 board. For an application I need to
>>>>store data into the on board flash device. My compiled code seams to
>>>>do an unaligned access to the on board flash which is enabled by the
>>>>NCS0 line.
>>>>
>>>>This is a very simple code for a better understanding.
>>>>
>>>>// Set the EBI_CSR0 register for 16 bit access etc.
>>>>HAL_WRITE_UINT32(0xFFE00000, 0x010030A1);
>>>>
>>>>// Write 0xAA to address 0x555 of into the flash device.
>>>>// Note: this is not the whole prog. seq.
>>>>HAL_WRITE_UINT16(0x01000000 + 0x555, 0xAA);
>>>> 
>>>>        
>>>>
>>>I don't think this is allowed. You have to do 16 bit accesses on 16
>>>bit aligned addresses. Maybe you want to do:
>>>
>>>HAL_WRITE_UINT8(0x01000000 + 0x555, 0xAA);
>>>HAL_WRITE_UINT8(0x01000000 + 0x556, 0x00);
>>>
>>>which will acheive the same but will do it in a legal way.
>>>
>>>      Andrew
>>>
>>>
>>>
>>>      
>>>
>>Your sugestion drives the NCS0 line twice and again the access is not 
>>alligned
>>(both read and write of the AT91 starts from A0 instead of A1). Since 
>>the memory cells of the flash
>>device are 16 bit long, while writing 0x556 means also writng to another 
>>cell instead
>>of 0x555.
>>
>>Please give more advice.
>>    
>>
>
>How do you have the MMU setup for that area of memory?
>
>        Andrew
>
>  
>
Well, the only way to set the memory behaviour that I konw is to 
configure the EBI_CSR0 register.
I set it up as follows.

// Set the EBI_CSR0 register for 16 bit access etc.
HAL_WRITE_UINT32(0xFFE00000, BA_0x010 | CSEN | EBI_BAT_BYTE_SELECT | EBI_TDF_0 | 4MB_PAGE | WSE | EBI_NWS_1 | EBI_DBW_16);







-- 
Mit freundlichen Grüssen / Best regards

Marcel Ovidiu Achim

OVIDIUS Ingenieurbüro
Vogelsangstr. 76
70197 Stuttgart/Germany

Tel.: +49 (0)711 62 03 600
Mobil: +49 (0)177 69 070 59
email: marcel.achim@ovidius-ib.de


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  parent reply	other threads:[~2005-05-08  0:05 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-05-07  9:16 Marcel Ovidiu Achim
2005-05-07  9:21 ` Marcel Ovidiu Achim
2005-05-08  9:36 ` Andrew Lunn
2005-05-09  3:58   ` Andrew Lunn
2005-05-09  4:02   ` Marcel Ovidiu Achim [this message]
2005-05-09  7:45     ` Marcel Ovidiu Achim

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