From: Andrew Lunn <andrew@lunn.ch>
To: R Vamshi Krishna <vamshi@cse.iitb.ac.in>
Cc: Andrew Lunn <andrew@lunn.ch>,
Fabian Scheler <fabian.scheler@gmail.com>,
ecos-discuss@ecos.sourceware.org
Subject: Re: [ECOS] Hard-Realtime behaviour
Date: Tue, 30 May 2006 11:12:00 -0000 [thread overview]
Message-ID: <20060530111112.GK2876@lunn.ch> (raw)
In-Reply-To: <Pine.LNX.4.61.0605301431510.22231@mars.cse.iitb.ac.in>
On Tue, May 30, 2006 at 02:36:05PM +0530, R Vamshi Krishna wrote:
>
> Continuing on the discussion, doesn't pipelining on modern processors add
> to our woes. Because then we cannot really determine if a particular
> instruction is going to 'x' cycles or 'y' cycles.
Realy you need to talk to the silicon vendor, or at least read the
data sheet and see what it says.
However I think pipelining in itself should not be a problem. It
should be deterministic under normal conditions. Only when things go
wrong will it be none deterministic, ie interrupts, exceptions, cache
misses is you have caches enabled.
If you are on a processor with HT like technology then i expect the
pipeline becomes none deterministic unless you disable all other
"processors".
Really, if you are worried about this level of detail, you probably
should be using a Z80, or some similar level of processor technology,
where you know what it is doing.
Andrew
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next prev parent reply other threads:[~2006-05-30 11:12 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-05-29 16:09 R Vamshi Krishna
2006-05-29 16:26 ` Fabian Scheler
2006-05-29 21:16 ` Wolfgang Köbler
2006-05-30 5:13 ` R Vamshi Krishna
2006-05-30 7:53 ` Andrew Lunn
2006-05-30 8:09 ` Fabian Scheler
2006-05-30 8:16 ` Andrew Lunn
2006-05-30 9:25 ` R Vamshi Krishna
2006-05-30 11:12 ` Andrew Lunn [this message]
[not found] ` <Pine.LNX.4.61.0 606031953120.6382@mars.cse.iitb.ac.in>
[not found] ` <Pine.LNX.4.61.0 606031953120.6382@mars.cse.iitb.ac.in>
[not found] ` <"Pine.LNX.4.61 .0 606031953120.6382"@mars.cse.iitb.ac.in>
[not found] ` <Pine.LNX.4.61.0606040253350.26447@m ars.cse.iitb.ac.in>
2006-06-03 16:26 ` R Vamshi Krishna
2006-06-03 20:13 ` Roy E Richardson
2006-06-03 21:31 ` R Vamshi Krishna
[not found] ` <003401c6885d $23027ee0$070fe644@EngAtPlayWS>
[not found] ` <003401c6885d $23027ee0$070fe644@EngAtPlayWS>
[not found] ` <003401c6885d$23027ee0$070fe644@EngAtPlayWS>
2006-06-18 22:21 ` R Vamshi Krishna
2006-06-18 23:31 ` John Carter
2006-06-18 23:46 ` R Vamshi Krishna
2006-06-19 0:27 ` John Carter
2006-05-30 11:15 ` Andrew Lunn
2006-05-30 14:44 ` Enno Luebbers
2006-05-30 9:34 ` Nils Labugt
2006-05-30 10:37 ` Fabian Scheler
2006-05-30 11:21 ` Luis Friedrich
2006-05-30 11:47 ` Fabian Scheler
2006-05-30 12:48 ` R Vamshi Krishna
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