[ECOS] FIQ on ARM processor

[ECOS] FIQ on ARM processor

[Arnaud Mouiche]

Hi.

when reading vector.s, it looks like ecos deal with FIQ like it deals with 
IRQ. Does it means there is no advantage to use FIQ than IRQ.

Has I prepare a special port, I would like to enable FIQ on this port.
There is 26 interruption sources on this processor. I choose to handle 
interruptions 0 to 25 as IRQ and to add virtual interruption from number 26 
to 51 that I will handled like FIQ.
Is it a good idea ?
If not, is there an other way to do ?

thanks

arnaud

Re: [ECOS] FIQ on ARM processor

[Jonathan Larmour]

Arnaud Mouiche wrote:
> 
> Hi.
> 
> when reading vector.s, it looks like ecos deal with FIQ like it deals with
> IRQ. Does it means there is no advantage to use FIQ than IRQ.

Yes there is. FIQs are defined for very fast interrupts. If you choose to
use the "standard" eCos interrupt handling mechanism then this somewhat
defeats this, so there is no point eCos trying to handle FIQ differently.

But you can still attach your own VSR (written in assembler) to FIQ.

Jifl
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Re: [ECOS] FIQ on ARM processor

[Andrew Lunn]

> If not, is there an other way to do ?

We have only one source generating FIQ interrupts. So we sidestep ecos
all together and install a VSR on the FIQ. That puts our code directly
onto the FIQ vector. You have to take the usual precausions, save
registers etc before jumping into C code. Also you cannot call any
eCos functions since your not in an eCos ISR. Only a few of our FIQ
interrupts require eCos to do something. When that happens we use a
software controlled interrupt to trigger an IRQ interrupt which eCos
then handles.

        Andrew