[ECOS] location of vsr table & virtual vector table in memory

[ECOS] location of vsr table & virtual vector table in memory

[Will Wagner]

Hi,

I'm trying to write a memory test app for an 860 board that runs from 
flash with its stack and data in the dual port ram.

This means that there is very limited RAM, 4K.

I want to create a ROM application with the hardware exception table 
remaining in flash.

The vsr and virtual vector table want to reside at the beginning of RAM.

I have managed to write suitable memory config files and the map file of 
the linked application looks fine except for the linker placing the vsr 
and virtual vector table at the wrong address.

The symbols hal_vsr_table and hal_virtual_vector_table are set in the 
file powerpc.ld as follows:

// Define VSR and virtual tables to reside at fixed addresses.
#include CYGBLD_HAL_TARGET_H
hal_vsr_table = CYGHWR_HAL_VSR_TABLE;
hal_virtual_vector_table = CYGHWR_HAL_VIRTUAL_VECTOR_TABLE;

I need CYGHWR_HAL_VSR_TABLE and CYGHWR_HAL_VIRTUAL_VECTOR_TABLE to point 
to the reserved sections in RAM from the memory config.

They are set in hal_powerpc_mpc8xx.cdl as follows:

# Note: This should be sub-variant specific to reduce memory use.
define_proc {
     puts $cdl_header "#define CYGHWR_HAL_VSR_TABLE 
(CYGHWR_HAL_POWERPC_VECTOR_BASE + 0x3000)"
     puts $cdl_header "#define CYGHWR_HAL_VIRTUAL_VECTOR_TABLE 
(CYGHWR_HAL_VSR_TABLE + 0x200)"
}

It appears they are hard coded to follow after the hardware exception 
table, but in my case this will remain in flash. Is there no way of 
changing this behaviour?

Currently the only way of working round my problem appears to be to 
change that cdl file. is that correct?

Many thanks,

Will Wagner


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