[ECOS] ecos bring up on s5pc100(cortex-a8)

[ECOS] ecos bring up on s5pc100(cortex-a8)

[xiaowei.cn.chen]

I am now porting ecos to Samsung S5pc100(cortex-A8).

In the ecos.db, I add my own package and target.

Can i use CYGPKG_HAL_CORTEXM as one of my packages in target?

I've checked that cortex-m series and cortex-a series are both support thumb-2 instruction set.

Am i right?

2011-01-12 



xiaowei.cn.chen 


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Re: [ECOS] ecos bring up on s5pc100(cortex-a8)

[Michael Bergandi]

> I am now porting ecos to Samsung S5pc100(cortex-A8).

Great, that would be the first Cortex-A8 contribution back to the tree.

> In the ecos.db, I add my own package and target.
>
> Can i use CYGPKG_HAL_CORTEXM as one of my packages in target?
>
> I've checked that cortex-m series and cortex-a series are both support thumb-2 instruction set.
>
> Am i right?

Well, yes, the Cortex-M and Cortex-A families both have Thumb2 support
in common. However, there are pretty significant differences between
them:

A series: cache/MMU, ARMv7-A instruction set, VFP, Jazelle, NEON,
MPcore (A9,A15)
M series: no cache/MMU, ARMv6-M ARMv7-M(E) instruction sets, FPU (M4), SIMD (M4)

I would think the differences are enough that a new Cortex-A hal
should be added. This may be more than you bargained for, but seems
like the 'right' way to go.

This is just my 2 cents on it. I hope someone else will chime in
correct me if I'm off base here.

-- 
Mike

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Re: [ECOS] ecos bring up on s5pc100(cortex-a8)

[Stefan Sommerfeld]

Hi,

>> I am now porting ecos to Samsung S5pc100(cortex-A8).
> 
> Great, that would be the first Cortex-A8 contribution back to the tree.
> 
>> In the ecos.db, I add my own package and target.
>>
>> Can i use CYGPKG_HAL_CORTEXM as one of my packages in target?
>>
>> I've checked that cortex-m series and cortex-a series are both support thumb-2 instruction set.
>>
>> Am i right?
> 
> Well, yes, the Cortex-M and Cortex-A families both have Thumb2 support
> in common. However, there are pretty significant differences between
> them:
> 
> A series: cache/MMU, ARMv7-A instruction set, VFP, Jazelle, NEON,
> MPcore (A9,A15)
> M series: no cache/MMU, ARMv6-M ARMv7-M(E) instruction sets, FPU (M4), SIMD (M4)
> 
> I would think the differences are enough that a new Cortex-A hal
> should be added. This may be more than you bargained for, but seems
> like the 'right' way to go.
> 
> This is just my 2 cents on it. I hope someone else will chime in
> correct me if I'm off base here.
> 

The Freescale i.MX51 implementation (which is a Cortex-A8 CPU) is based on eCos
ARM/ARM9 HAL's. I would suggest starting there instead of creating a new HAL.

Bye...

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Re: [ECOS] ecos bring up on s5pc100(cortex-a8)

[Michael Bergandi]

Stefan,

> The Freescale i.MX51 implementation (which is a Cortex-A8 CPU) is based on eCos
> ARM/ARM9 HAL's. I would suggest starting there instead of creating a new HAL.

That really doesn't make much since to me. ARM9s use the ARMv4T and
ARMv5T(E) instruction sets. Those are both Thumb only and obviously
lack improvements and extensions from the ARMv7(T) instruction set. I
suppose if you only want stripped down and Thumb only code, then that
would work. However, if you intend on actually using anything from
ARMv7 or some of the other features of a Cortex-A8 (multi-core
perhaps) that you would need to at least turn on the necessary
compiler flags.

The cortexm hal seems like a closer match to me. Although, after
looking at the code, it appears to be very minimal at the moment.


-- 
Mike

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Re: [ECOS] ecos bring up on s5pc100(cortex-a8)

[Stefan Sommerfeld]

Hi Michael,

>> The Freescale i.MX51 implementation (which is a Cortex-A8 CPU) is based on eCos
>> ARM/ARM9 HAL's. I would suggest starting there instead of creating a new HAL.
> 
> That really doesn't make much since to me. ARM9s use the ARMv4T and
> ARMv5T(E) instruction sets. Those are both Thumb only and obviously
> lack improvements and extensions from the ARMv7(T) instruction set. I
> suppose if you only want stripped down and Thumb only code, then that
> would work. However, if you intend on actually using anything from
> ARMv7 or some of the other features of a Cortex-A8 (multi-core
> perhaps) that you would need to at least turn on the necessary
> compiler flags.
> 
> The cortexm hal seems like a closer match to me. Although, after
> looking at the code, it appears to be very minimal at the moment.
> 
> 
eCos runs anything without thumb code and it runs fine here. But if you like to
do a cortex-a HAL, I would love to support you. Especially for cortex-a9
multicores it will be important.

Feel free to contact me directly to work on some details.

Bye...

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[ECOS] Re: ecos bring up on s5pc100(cortex-a8)

[John Dallaway]

Stefan Sommerfeld wrote:

>>> The Freescale i.MX51 implementation (which is a Cortex-A8 CPU) is based on eCos
>>> ARM/ARM9 HAL's. I would suggest starting there instead of creating a new HAL.
>> That really doesn't make much since to me. ARM9s use the ARMv4T and
>> ARMv5T(E) instruction sets. Those are both Thumb only and obviously
>> lack improvements and extensions from the ARMv7(T) instruction set. I
>> suppose if you only want stripped down and Thumb only code, then that
>> would work. However, if you intend on actually using anything from
>> ARMv7 or some of the other features of a Cortex-A8 (multi-core
>> perhaps) that you would need to at least turn on the necessary
>> compiler flags.
>>
>> The cortexm hal seems like a closer match to me. Although, after
>> looking at the code, it appears to be very minimal at the moment.
>>
> eCos runs anything without thumb code and it runs fine here. But if you like to
> do a cortex-a HAL, I would love to support you. Especially for cortex-a9
> multicores it will be important.

Please note that eCos on Cortex-A was discussed some time ago on this
list in the context of a proposed port to OMAP3530. Ref:

  http://ecos.sourceware.org/ml/ecos-discuss/2009-05/msg00089.html

John Dallaway
eCos maintainer

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Re: [ECOS] Re: ecos bring up on s5pc100(cortex-a8)

[Nick Garnett]

John Dallaway <john@dallaway.org.uk> writes:

> >> The cortexm hal seems like a closer match to me. Although, after
> >> looking at the code, it appears to be very minimal at the moment.

The Cortex-M devices are very different to the A8 and all other
ARMs. Apart from the instruction set, almost all of the architecture
is different. The A8 implements essentially the same architecture as
previous ARMs.

> > eCos runs anything without thumb code and it runs fine here. But if you like to
> > do a cortex-a HAL, I would love to support you. Especially for cortex-a9
> > multicores it will be important.
> 
> Please note that eCos on Cortex-A was discussed some time ago on this
> list in the context of a proposed port to OMAP3530. Ref:
> 
>   http://ecos.sourceware.org/ml/ecos-discuss/2009-05/msg00089.html

Indeed, and the advice given there should remain. The A8 can be viewed
as an ARM9 with some bells and whistles. Most of those bells and
whistles are largely irrelevant to eCos -- they are mainly intended to
make the ARM architecture more suitable for server class applications.
Any A8 port should be based on the ARM architecture HAL, plus an A8
variant HAL and a platform HAL. The A8 variant HAL can be modelled on
the ARM9 variant HAL, and should initially be created by copying it.

-- 
Nick Garnett                                      eCos Kernel Architect
eCosCentric Limited    http://www.eCosCentric.com      The eCos experts
Barnwell House, Barnwell Drive, Cambridge, UK.     Tel: +44 1223 245571
Registered in England and Wales:                        Reg No: 4422071


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Re: [ECOS] Re: ecos bring up on s5pc100(cortex-a8)

[Nick Garnett]

"xiaowei.cn.chen" <xiaowei.cn.chen@gmail.com> writes:

> Hi, Everybody.
> 
> Thank you very much for all of you.
> 
> Now, I am trying to create a new HAL with reference to cortex-m and
> arm9 series. And because of time zones, my reply may late.
>

What do you mean by a new HAL? As I said, Cortex-M is irrelevant to
the A8 and will provide no useful information. The A8 implements
essentially the same architecture as existing ARMs and a new
architecture HAL is not needed. I hope you mean that you are
implementing a new variant HAL, still using the existing ARM
architecture HAL. Certainly any other approach would not be accepted
for contribution to the eCos source base (you are of course free to do
whatever you want for your own use).


-- 
Nick Garnett                                      eCos Kernel Architect
eCosCentric Limited    http://www.eCosCentric.com      The eCos experts
Barnwell House, Barnwell Drive, Cambridge, UK.     Tel: +44 1223 245571
Registered in England and Wales:                        Reg No: 4422071


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