[ECOS] STM32F4 timers test problem….

[ECOS] STM32F4 timers test problem….

[Morris, Richard]

I have been having trouble running the STM32F4 timers test on the STM3240G-Eval board:

    ecos/packages/hal/cortexm/stm32/var/current/tests/timers.c

The test would SIGTRAP in GDB when executing:

           cyg_thread_delay( 5*100 );

in the while loop in "timers_test()" in timers.c.

The issue seems to be that the clocks for the timers are not enabled in the RCC_APB1ENR and 
RCC_APB2ENR registers, so when the timers are attempted to be initialized, the initialization is not successful and the timers don't run.

I am not exactly sure why this would relate to the SIGTRAP, but when I resolved the timer initialization, the SIGTRAP went away.  If anyone could explain this, I would be interested in better understanding.

I enabled these clocks (now the test seems to run reliably) by adding code shown below at the end of "hal_variant_init()" in stm32_misc.c to initialize the TIMer clocks.

I suspect this is not the correct place for this change, but wasn't sure where to make it.  There probably also needs to be some conditional compilation to take care of the various variants of the processor.

 #######################################################################################
void hal_variant_init( void )
{

#if 1 //!defined(CYG_HAL_STARTUP_RAM)
    hal_start_clocks();
#endif

    // Attach EXTI springboard to interrupt vectors
    HAL_INTERRUPT_ATTACH( CYGNUM_HAL_INTERRUPT_EXTI9_5,   hal_exti_isr, 0, 0 );
    HAL_INTERRUPT_ATTACH( CYGNUM_HAL_INTERRUPT_EXTI15_10, hal_exti_isr, 0, 0 );
    
#ifdef CYGSEM_HAL_VIRTUAL_VECTOR_SUPPORT
    hal_if_init();
#endif

#if (1)
    // A hack for now, enable timer clocks for STM32F407IG
    unsigned int reg;
    HAL_READ_UINT32((CYGHWR_HAL_STM32_RCC + CYGHWR_HAL_STM32_RCC_APB1ENR), reg );
    HAL_WRITE_UINT32((CYGHWR_HAL_STM32_RCC + CYGHWR_HAL_STM32_RCC_APB1ENR),
                     (reg
                      | (1u << CYGHWR_HAL_STM32_RCC_APB1ENR_TIM2) 
                      | (1u << CYGHWR_HAL_STM32_RCC_APB1ENR_TIM3)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB1ENR_TIM4)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB1ENR_TIM5)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB1ENR_TIM6)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB1ENR_TIM7)
                     )
                    );
    HAL_READ_UINT32((CYGHWR_HAL_STM32_RCC + CYGHWR_HAL_STM32_RCC_APB2ENR), reg );
    HAL_WRITE_UINT32((CYGHWR_HAL_STM32_RCC + CYGHWR_HAL_STM32_RCC_APB2ENR),
                     (reg
                      | (1u << CYGHWR_HAL_STM32_RCC_APB2ENR_TIM1)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB2ENR_TIM8)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB2ENR_TIM9)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB2ENR_TIM10)
                      | (1u << CYGHWR_HAL_STM32_RCC_APB2ENR_TIM11)
                     )
                    );
#endif
}
#######################################################################################

This seems to resolve the issue and now the timer test runs reliably and displays reasonable looking results, whereas before the results were always 0.

Advice on how this initialization would be more correctly done would be appreciated.






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