[ECOS] Re: Redboot for Kinetis TWR-K70F120M

[ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Ilija Kocho]

Hello Linh

Thank you for your interest in eCos for Kinetis. First I would invite 
you to post your comments and questions to some of eCos mailing lists:
http://ecos.sourceware.org/intouch.html The benefit is both for 
community and you, for instance I have no experience with J-Link, but 
somebody else may have.

Regarding your attempt to run eCos on K70, apparently you are luckier 
than me :) as you already got a K70 tower.
I am waiting for my K70 tower so I haven't been able to play with K70 so 
far, but from K70 RM I can assume that variant HAL may need some changes 
(Clocking, etc.) in order to become compatible with K70.

Regarding your code: I would avoid changing variant default settings, 
you can achieve similar effect by stating requirements in platform HAL, 
Please look at K40 CDL.

Regards
Ilija


On 03.01.2012 09:00, Linh Nguyá»…n wrote:
> Dear Kocho,
>
> Currently, I porting Redboot from TWR K60 to K70. I have used source 
> code from http://hg-pub.ecoscentric.com/ecos/. The attach files are 
> patch for TWR K70 and eCos config file for k70-redboot. Redboot for 
> K70 can build, but it can not run after download by IAR workbench 
> through J-Link. Can you spend some free times to get overview on it, 
> then give me your comments please. Thanks so much and have nice week.
>
> I'm looking forward to hearing from you.
>
> Thanks & Regards,
> Linh Nguyen

diff -rupN ecos-3.0-orgi/packages/ecos.db ecos-3.0/packages/ecos.db
--- ecos-3.0-orgi/packages/ecos.db	2012-01-03 14:14:53.237129244 +0700
+++ ecos-3.0/packages/ecos.db	2012-01-02 18:16:25.292218103 +0700
@@ -7126,6 +7126,16 @@ package CYGPKG_HAL_CORTEXM_KINETIS_TWR_K
          eCos on the Freescale Tower development system."
  }

+package CYGPKG_HAL_CORTEXM_KINETIS_TWR_K70F120M {
+	alias		{ "Freescale TWR-K70F120M HAL" hal_cortexm_twr_k70f120m }
+	directory	hal/cortexm/kinetis/twr_k70f120m
+	script		hal_cortexm_kinetis_twr_k70f120m.cdl
+	hardware
+        description "
+        The TWR-K70F120M HAL package provides the support needed to run
+        eCos on the Freescale Tower development system."
+}
+
  package CYGPKG_HAL_CORTEXM_KINETIS_TWR_K40X256 {
  	alias		{ "Freescale TWR-K40X256 HAL" hal_cortexm_twr_k40x256 }
  	directory	hal/cortexm/kinetis/twr_k40x256
@@ -7151,6 +7161,21 @@ target freescale_twr_k60n512 {
          to run eCos on the Freescale TWR-K60N512 development system."
  }

+target freescale_twr_k70f120m {
+        alias { "Freescale Kinetis TWR-K70F120M" twr_k70f120m }
+        packages { CYGPKG_HAL_CORTEXM
+                   CYGPKG_HAL_CORTEXM_KINETIS
+                   CYGPKG_HAL_CORTEXM_KINETIS_TWR_K70F120M
+                   CYGPKG_IO_SERIAL_FREESCALE_UART_HDR
+                   CYGPKG_IO_SERIAL_FREESCALE_UART
+                   CYGPKG_DEVICES_WALLCLOCK_KINETIS_RTC
+                   CYGPKG_DEVS_ETH_PHY
+                   CYGPKG_DEVS_ETH_FREESCALE_ENET
+                 }
+        description "The freescale_twr_k70f120m target provides the packages needed
+        to run eCos on the Freescale TWR-K70F120M development system."
+}
+
  target freescale_twr_k40x256 {
          alias { "Freescale Kinetis TWR-K40X256" twr_k40x256 }
          packages { CYGPKG_HAL_CORTEXM
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl	1970-01-01 07:00:00.000000000 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/cdl/hal_cortexm_kinetis_twr_k70f120m.cdl	2012-01-03 14:26:18.062567747 +0700
@@ -0,0 +1,286 @@
+##==========================================================================
+##
+##      hal_cortexm_kinetis_twr_k70f120m.cdl
+##
+##      Cortex-M Freescale TWR-K70F120M platform HAL configuration data
+##
+##==========================================================================
+## ####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 2011 Free Software Foundation, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later
+## version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT
+## ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with eCos; if not, write to the Free Software Foundation, Inc.,
+## 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+##
+## As a special exception, if other files instantiate templates or use
+## macros or inline functions from this file, or you compile this file
+## and link it with other works to produce a work based on this file,
+## this file does not by itself cause the resulting work to be covered by
+## the GNU General Public License. However the source code for this file
+## must still be made available in accordance with section (3) of the GNU
+## General Public License v2.
+##
+## This exception does not invalidate any other reasons why a work based
+## on this file might be covered by the GNU General Public License.
+## -------------------------------------------
+## ####ECOSGPLCOPYRIGHTEND####
+##==========================================================================
+#######DESCRIPTIONBEGIN####
+##
+## Author(s):    Linh Nguyen<nvl1109@gmail.com>
+## Date:         2012-01-02
+##
+######DESCRIPTIONEND####
+##
+##==========================================================================
+
+cdl_package CYGPKG_HAL_CORTEXM_KINETIS_TWR_K70F120M {
+    display       "Freescale Kinetis TWR-K70F120M Platform"
+    parent        CYGPKG_HAL_CORTEXM_KINETIS
+    define_header hal_cortexm_kinetis_twr_k70f120m.h
+    include_dir   cyg/hal
+    hardware
+    requires      { CYGHWR_HAL_CORTEXM_SYSTICK_CLK_SOURCE == "INTERNAL" }
+    requires      { is_active(CYGPKG_DEVS_ETH_FREESCALE_ENET)
+                  implies CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "OSC" }
+
+    implements    CYGINT_IO_SERIAL_FREESCALE_UART2
+    implements    CYGINT_HAL_FREESCALE_UART2
+    implements    CYGINT_HAL_CORTEXM_KINETIS_RTC
+
+
+    description   "
+        The Freescale TWR K70F120M Platform HAL package provides the support
+        needed to run eCos on the TWR K70F120M development system. This package
+        can also be used for other boards that employ a controller from Kinetis
+        families."
+
+    compile       twr_k70f120m_misc.c
+
+    requires      { is_active(CYGPKG_DEVS_ETH_PHY) implies
+        (1 == CYGHWR_DEVS_ETH_PHY_KSZ8041) }
+    define_proc {
+        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H<pkgconf/hal_cortexm_kinetis_twr_k70f120m.h>"
+        puts $::cdl_header "#define HAL_PLATFORM_CPU    \"Cortex-M4\""
+        puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"Freescale TWR-K70F120M\""
+        puts $::cdl_header "#define HAL_PLATFORM_EXTRA  \"\""
+    }
+
+
+    cdl_option CYGHWR_HAL_CORTEXM_KINETIS_PLF_XTAL_OR_OSC_FREQ {
+        display "Platform Clock Frequency"
+        flavor data
+        parent CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT
+        active_if { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "OSC" ||
+                   CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" }
+        default_value 50000000
+        legal_values { 25000000 50000000 }
+    }
+
+    cdl_option CYGHWR_HAL_CORTEXM_KINETIS_PLF_OSC_CAP {
+        display "Platform requred XTAL || C \[pF\]"
+        flavor bool
+        default_value { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" }
+        parent CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT
+        active_if { CYGOPT_HAL_CORTEXM_KINETIS_MCG_REF_EXT_IS == "XTAL" }
+        requires { CYGHWR_HAL_CORTEXM_KINETIS_OSC_CAP == 20 }
+    }
+
+    cdl_option CYGHWR_HAL_CORTEXM_KINETIS_PLF_RTC {
+        display "Platform requred RTC XTAL || C \[pF\]"
+        flavor bool
+        default_value 0
+        parent CYGHWR_HAL_CORTEXM_KINETIS_RTC
+        requires { CYGHWR_HAL_CORTEXM_KINETIS_RTC_OSC_CAP == 20 }
+    }
+
+    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
+        display      "Number of communication channels on the board"
+        flavor       data
+        legal_values 0 to 2
+        default_value   1
+    }
+
+    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
+        display          "Debug serial port"
+        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_CONFIGURABLE
+        flavor data
+        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
+        default_value    0
+        description      "
+            The TWR board has one serial port fitted to RS232 connector.
+            This option chooses which port will be used to connect to a host
+            running GDB."
+    }
+
+    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
+        display          "Diagnostic serial port"
+        active_if        CYGPRI_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_CONFIGURABLE
+        flavor data
+        legal_values     0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
+        default_value    0
+        description      "
+            The TWR has one serial port fitted to RS232 connector.
+            This option chooses which port will be used for diagnostic output."
+    }
+
+    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD {
+        display       "Console serial port baud rate"
+        flavor        data
+        legal_values  9600 19200 38400 57600 115200
+        default_value 115200
+        description   "
+        This option controls the default baud rate used for the
+        console connection.
+        Note: this should match the value chosen for the GDB port if the
+        diagnostic and GDB port are the same."
+    }
+
+    cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL_BAUD {
+        display       "GDB serial port baud rate"
+        flavor        data
+        legal_values  9600 19200 38400 57600 115200
+        default_value 115200
+        description   "
+            This option controls the default baud rate used for the
+            GDB connection.
+            Note: this should match the value chosen for the console port
+            if the console and GDB port are the same."
+    }
+
+    cdl_option CYGHWR_FREESCALE_ENET_MII_MDC_HAL_CLOCK {
+        display "ENET MII MDC clock provided by HAL"
+        flavor data
+        active_if CYGPKG_DEVS_ETH_FREESCALE_ENET
+        parent CYGPKG_DEVS_ETH_FREESCALE_ENET
+        calculated CYGHWR_HAL_CORTEXM_KINETIS_CLK_PER_BUS
+        description "
+            ENET needs a clock with typical frequency of up to 2.5 MHz for
+            MII MDC. The input clock, typically provided by HAL, is further
+            divided by ENET according to setting of ENET MSCR register in order to
+            provide frequency within 2.5 MHz range."
+     }
+
+    cdl_option CYGHWR_HAL_FREESCALE_ENET_E0_1588_PORT {
+        display "IEEE 1588 Port"
+        active_if CYGSEM_DEVS_ETH_FREESCALE_ENET_1588
+        parent CYGSEM_DEVS_ETH_FREESCALE_ENET_1588
+        flavor data
+        default_value { "B" }
+        legal_values { "B" "C" "User" }
+        description "
+            Digital I/O provided by HAL for ENET IEEE 1588 timers."
+    }
+
+    cdl_component CYGBLD_GLOBAL_OPTIONS {
+        display "Global build options"
+        flavor  none
+        parent  CYGPKG_NONE
+        description   "
+        Global build options including control over
+        compiler flags, linker flags and choice of toolchain."
+
+
+        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
+            display "Global command prefix"
+            flavor  data
+            no_define
+            default_value { "arm-eabi" }
+            description "
+                This option specifies the command prefix used when
+                invoking the build tools."
+        }
+
+        cdl_option CYGBLD_GLOBAL_CFLAGS {
+            display "Global compiler flags"
+            flavor  data
+            no_define
+            default_value { CYGBLD_GLOBAL_WARNFLAGS . "-mcpu=cortex-m3 -mthumb -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions" }
+            description   "
+            This option controls the global compiler flags which are used to
+            compile all packages by default. Individual packages may define
+            options which override these global flags."
+        }
+
+        cdl_option CYGBLD_GLOBAL_LDFLAGS {
+            display "Global linker flags"
+            flavor  data
+            no_define
+            default_value { "-mcpu=cortex-m3 -mthumb -Wl,--gc-sections -Wl,-static -Wl,-n -g -nostdlib" }
+            description   "
+            This option controls the global linker flags. Individual
+            packages may define options which override these global flags."
+        }
+    }
+
+    cdl_option CYGSEM_HAL_ROM_MONITOR {
+        display       "Behave as a ROM monitor"
+        flavor        bool
+        default_value 0
+        parent        CYGPKG_HAL_ROM_MONITOR
+        requires      { CYG_HAL_STARTUP == "ROM" || CYG_HAL_STARTUP == "JTAG" }
+        requires      { CYGDBG_HAL_CRCTABLE_LOCATION == "ROM" }
+        description   "
+            Enable this option if this program is to be used as a ROM monitor,
+            i.e. applications will be loaded into RAM on the board, and this
+            ROM monitor may process exceptions or interrupts generated from the
+            application. This enables features such as utilizing a separate
+            interrupt stack when exceptions are generated."
+    }
+
+    cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
+        display       "Work with a ROM monitor"
+        flavor        booldata
+        legal_values  { "Generic" "GDB_stubs" }
+        default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
+        parent        CYGPKG_HAL_ROM_MONITOR
+        requires      { CYG_HAL_STARTUP == "RAM" }
+        description   "
+            Support can be enabled for different varieties of ROM monitor.
+            This support changes various eCos semantics such as the encoding
+            of diagnostic output, or the overriding of hardware interrupt
+            vectors.
+            Firstly there is \"Generic\" support which prevents the HAL
+            from overriding the hardware vectors that it does not use, to
+            instead allow an installed ROM monitor to handle them. This is
+            the most basic support which is likely to be common to most
+            implementations of ROM monitor.
+            \"GDB_stubs\" provides support when GDB stubs are included in
+            the ROM monitor or boot ROM."
+    }
+
+
+    cdl_component CYGBLD_HAL_CORTEXM_TWR_MK70F120M_GDB_STUBS {
+        display "Create StubROM SREC and binary files"
+        active_if CYGBLD_BUILD_COMMON_GDB_STUBS
+        no_define
+        calculated 1
+        requires { CYG_HAL_STARTUP == "ROM" }
+
+        make -priority 325 {
+<PREFIX>/bin/stubrom.srec :<PREFIX>/bin/gdb_module.img
+            $(OBJCOPY) -O srec $<  $@
+        }
+        make -priority 325 {
+<PREFIX>/bin/stubrom.bin :<PREFIX>/bin/gdb_module.img
+            $(OBJCOPY) -O binary $<  $@
+        }
+
+        description "
+            This component causes the ELF image generated by the
+            build process to be converted to S-Record and binary
+            files."
+    }
+}
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog	1970-01-01 07:00:00.000000000 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/ChangeLog	2012-01-02 18:16:25.484215703 +0700
@@ -0,0 +1,29 @@
+2012-01-02  Linh Nguyen<nvl1109@gmail.com>
+
+	* cdl/hal_cortexm_kinetis_twr_k70f120m.cdl:
+	* src/twr_k70f120m_misc.c:
+	New package -- Freescale TWR-K70F120m board.
+	
+//===========================================================================
+// ####GPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2011 Free Software Foundation, Inc.
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 or (at your option) any
+// later version.
+//
+// This program is distributed in the hope that it will be useful, but
+// WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+// General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the
+// Free Software Foundation, Inc., 51 Franklin Street,
+// Fifth Floor, Boston, MA  02110-1301, USA.
+// -------------------------------------------
+// ####GPLCOPYRIGHTEND####
+//===========================================================================
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_arch.h ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_arch.h
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_arch.h	1970-01-01 07:00:00.000000000 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_arch.h	2012-01-02 18:16:25.484215703 +0700
@@ -0,0 +1,63 @@
+#ifndef CYGONCE_HAL_PLF_ARCH_H
+#define CYGONCE_HAL_PLF_ARCH_H
+//=============================================================================
+//
+//      plf_arch.h
+//
+//      Platform specific architecture overrides
+//
+//=============================================================================
+// ####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2011 Free Software Foundation, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later
+// version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with eCos; if not, write to the Free Software Foundation, Inc.,
+// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+//
+// As a special exception, if other files instantiate templates or use
+// macros or inline functions from this file, or you compile this file
+// and link it with other works to produce a work based on this file,
+// this file does not by itself cause the resulting work to be covered by
+// the GNU General Public License. However the source code for this file
+// must still be made available in accordance with section (3) of the GNU
+// General Public License v2.
+//
+// This exception does not invalidate any other reasons why a work based
+// on this file might be covered by the GNU General Public License.
+// -------------------------------------------
+// ####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   Linh Nguyen
+// Contributor(s):
+// Date:        2012-01-02
+// Purpose:     TWR-K70F120M platform specific architecture overrides
+// Description:
+// Usage:       #include<cyg/hal/plf_arch.h>
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include<pkgconf/hal.h>
+#include<pkgconf/hal_cortexm_kinetis_twr_k70f120m.h>
+
+
+//=============================================================================
+
+//-----------------------------------------------------------------------------
+// end of plf_arch.h
+#endif // CYGONCE_HAL_PLF_ARCH_H
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_intr.h ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_intr.h
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_intr.h	1970-01-01 07:00:00.000000000 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_intr.h	2012-01-02 18:16:25.484215703 +0700
@@ -0,0 +1,62 @@
+#ifndef CYGONCE_HAL_PLF_INTR_H
+#define CYGONCE_HAL_PLF_INTR_H
+//=============================================================================
+//
+//      plf_intr.h
+//
+//      Platform specific interrupt overrides
+//
+//=============================================================================
+// ####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2011 Free Software Foundation, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later
+// version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with eCos; if not, write to the Free Software Foundation, Inc.,
+// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+//
+// As a special exception, if other files instantiate templates or use
+// macros or inline functions from this file, or you compile this file
+// and link it with other works to produce a work based on this file,
+// this file does not by itself cause the resulting work to be covered by
+// the GNU General Public License. However the source code for this file
+// must still be made available in accordance with section (3) of the GNU
+// General Public License v2.
+//
+// This exception does not invalidate any other reasons why a work based
+// on this file might be covered by the GNU General Public License.
+// -------------------------------------------
+// ####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   Linh Nguyen
+// Date:        2012-01-02
+// Purpose:     TWR-K70F120M platform specific interrupt overrides
+// Description:
+// Usage:       #include<cyg/hal/plf_intr.h>
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include<pkgconf/hal.h>
+#include<pkgconf/hal_cortexm_kinetis_twr_k70f120m.h>
+
+
+//=============================================================================
+
+//-----------------------------------------------------------------------------
+// end of plf_intr.h
+#endif // CYGONCE_HAL_PLF_INTR_H
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_io.h ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_io.h
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_io.h	1970-01-01 07:00:00.000000000 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/include/plf_io.h	2012-01-03 12:32:00.596297873 +0700
@@ -0,0 +1,139 @@
+#ifndef CYGONCE_HAL_PLF_IO_H
+#define CYGONCE_HAL_PLF_IO_H
+//=============================================================================
+//
+//      plf_io.h
+//
+//      Platform specific registers
+//
+//=============================================================================
+// ####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2011 Free Software Foundation, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later
+// version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with eCos; if not, write to the Free Software Foundation, Inc.,
+// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+//
+// As a special exception, if other files instantiate templates or use
+// macros or inline functions from this file, or you compile this file
+// and link it with other works to produce a work based on this file,
+// this file does not by itself cause the resulting work to be covered by
+// the GNU General Public License. However the source code for this file
+// must still be made available in accordance with section (3) of the GNU
+// General Public License v2.
+//
+// This exception does not invalidate any other reasons why a work based
+// on this file might be covered by the GNU General Public License.
+// -------------------------------------------
+// ####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   Linh Nguyen
+// Date:        2012-01-02
+// Purpose:     TWR-K70F120M platform specific registers
+// Description:
+// Usage:       #include<cyg/hal/plf_io.h>
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include<pkgconf/hal.h>
+#include<pkgconf/hal_cortexm_kinetis_twr_k70f120m.h>
+
+
+// UART PINs
+#ifndef CYGHWR_HAL_FREESCALE_UART2_PIN_RX
+# define CYGHWR_HAL_FREESCALE_UART2_PIN_RX CYGHWR_HAL_KINETIS_PIN(E, 16, 3, 0)
+# define CYGHWR_HAL_FREESCALE_UART2_PIN_TX CYGHWR_HAL_KINETIS_PIN(E, 17, 3, 0)
+# define CYGHWR_HAL_FREESCALE_UART2_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
+# define CYGHWR_HAL_FREESCALE_UART2_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
+
+# define CYGHWR_IO_FREESCALE_UART2_PIN_RX CYGHWR_HAL_FREESCALE_UART2_PIN_RX
+# define CYGHWR_IO_FREESCALE_UART2_PIN_TX CYGHWR_HAL_FREESCALE_UART2_PIN_TX
+# define CYGHWR_IO_FREESCALE_UART2_PIN_RTS CYGHWR_HAL_FREESCALE_UART2_PIN_RTS
+# define CYGHWR_IO_FREESCALE_UART2_PIN_CTS CYGHWR_HAL_FREESCALE_UART2_PIN_CTS
+#endif
+#ifndef CYGHWR_HAL_FREESCALE_UART3_PIN_RX
+# define CYGHWR_HAL_FREESCALE_UART3_PIN_RX CYGHWR_HAL_KINETIS_PIN(F, 7, 4, 0)
+# define CYGHWR_HAL_FREESCALE_UART3_PIN_TX CYGHWR_HAL_KINETIS_PIN(F, 8, 4, 0)
+# define CYGHWR_HAL_FREESCALE_UART3_PIN_RTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
+# define CYGHWR_HAL_FREESCALE_UART3_PIN_CTS CYGHWR_HAL_KINETIS_PORT_PIN_NONE
+
+# define CYGHWR_IO_FREESCALE_UART3_PIN_RX CYGHWR_HAL_FREESCALE_UART3_PIN_RX
+# define CYGHWR_IO_FREESCALE_UART3_PIN_TX CYGHWR_HAL_FREESCALE_UART3_PIN_TX
+# define CYGHWR_IO_FREESCALE_UART3_PIN_RTS CYGHWR_HAL_FREESCALE_UART3_PIN_RTS
+# define CYGHWR_IO_FREESCALE_UART3_PIN_CTS CYGHWR_HAL_FREESCALE_UART3_PIN_CTS
+#endif
+
+// ENET PINs
+
+// MDIO
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_MDIO    CYGHWR_HAL_KINETIS_PIN(B, 0, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_MDC     CYGHWR_HAL_KINETIS_PIN(B, 1, 4, 0)
+// Both RMII and MII interface
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_RXER    CYGHWR_HAL_KINETIS_PIN(A, 5, 4, \
+                                                    CYGHWR_HAL_KINETIS_PORT_PCR_PE_M)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_RXD1    CYGHWR_HAL_KINETIS_PIN(A, 12, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_RXD0    CYGHWR_HAL_KINETIS_PIN(A, 13, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_TXEN    CYGHWR_HAL_KINETIS_PIN(A, 15, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_TXD0    CYGHWR_HAL_KINETIS_PIN(A, 16, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_TXD1    CYGHWR_HAL_KINETIS_PIN(A, 17, 4, 0)
+// RMII interface only
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_RMII0_CRS_DV  CYGHWR_HAL_KINETIS_PIN(A, 14, 4, 0)
+// MII interface only
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_RXD3     CYGHWR_HAL_KINETIS_PIN(A, 9, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_RXD2     CYGHWR_HAL_KINETIS_PIN(A, 10, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_RXCLK    CYGHWR_HAL_KINETIS_PIN(A, 11, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_TXD2     CYGHWR_HAL_KINETIS_PIN(A, 24, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_TXCLK    CYGHWR_HAL_KINETIS_PIN(A, 25, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_TXD3     CYGHWR_HAL_KINETIS_PIN(A, 26, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_CRS      CYGHWR_HAL_KINETIS_PIN(A, 27, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MIIO_TXER     CYGHWR_HAL_KINETIS_PIN(A, 28, 4, 0)
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_MII0_COL      CYGHWR_HAL_KINETIS_PIN(A, 29, 4, 0)
+// IEEE 1588 timers
+#define CYGHWR_IO_FREESCALE_ENET0_PIN_1588_CLKIN    CYGHWR_HAL_KINETIS_PIN(E, 26, 4, 0)
+
+#if defined(CYGHWR_HAL_FREESCALE_ENET0_E0_1588_PORT_B)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR0  CYGHWR_HAL_KINETIS_PIN(B, 2, 4, 0)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR1  CYGHWR_HAL_KINETIS_PIN(B, 3, 4, 0)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR2  CYGHWR_HAL_KINETIS_PIN(B, 4, 4, 0)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR3  CYGHWR_HAL_KINETIS_PIN(B, 5, 4, 0)
+#elif defined(CYGHWR_HAL_FREESCALE_ENET0_E0_1588_PORT_C)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR0  CYGHWR_HAL_KINETIS_PIN(C, 16, 4, 0)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR1  CYGHWR_HAL_KINETIS_PIN(C, 17, 4, 0)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR2  CYGHWR_HAL_KINETIS_PIN(C, 18, 4, 0)
+# define CYGHWR_IO_FREESCALE_ENET0_PIN_E0_1588_TMR3  CYGHWR_HAL_KINETIS_PIN(C, 19, 4, 0)
+#endif
+//=============================================================================
+// Memory access checks.
+//
+// Accesses to areas not backed by real devices or memory can cause
+// the CPU to hang. These macros allow the GDB stubs to avoid making
+// accidental accesses to these areas.
+
+__externC int cyg_hal_stub_permit_data_access( CYG_ADDRESS addr, cyg_uint32 count );
+
+#define CYG_HAL_STUB_PERMIT_DATA_READ(_addr_,_count_) cyg_hal_stub_permit_data_access(_addr_,_count_  )
+
+#define CYG_HAL_STUB_PERMIT_DATA_WRITE(_addr_,_count_  ) cyg_hal_stub_permit_data_access(_addr_,_count_  )
+
+//=============================================================================
+
+
+//-----------------------------------------------------------------------------
+// end of plf_io.h
+#endif // CYGONCE_HAL_PLF_IO_H
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/src/twr_k70f120m_misc.c ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/src/twr_k70f120m_misc.c
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/twr_k70f120m/current/src/twr_k70f120m_misc.c	1970-01-01 07:00:00.000000000 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/twr_k70f120m/current/src/twr_k70f120m_misc.c	2012-01-02 18:16:25.485215691 +0700
@@ -0,0 +1,229 @@
+//==========================================================================
+//
+//      twr_k70f120m_misc.c
+//
+//      Cortex-M4 TWR-K70F120M EVAL HAL functions
+//
+//==========================================================================
+// ####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 2011 Free Software Foundation, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later
+// version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT
+// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with eCos; if not, write to the Free Software Foundation, Inc.,
+// 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+//
+// As a special exception, if other files instantiate templates or use
+// macros or inline functions from this file, or you compile this file
+// and link it with other works to produce a work based on this file,
+// this file does not by itself cause the resulting work to be covered by
+// the GNU General Public License. However the source code for this file
+// must still be made available in accordance with section (3) of the GNU
+// General Public License v2.
+//
+// This exception does not invalidate any other reasons why a work based
+// on this file might be covered by the GNU General Public License.
+// -------------------------------------------
+// ####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):      ilijak
+// Contributor(s):
+// Date:           2011-02-05
+// Description:
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+#include<pkgconf/hal.h>
+#include<pkgconf/hal_cortexm.h>
+#include<pkgconf/hal_cortexm_kinetis.h>
+#include<pkgconf/hal_cortexm_kinetis_twr_k70f120m.h>
+#ifdef CYGPKG_KERNEL
+#include<pkgconf/kernel.h>
+#endif
+
+#include<cyg/infra/diag.h>
+#include<cyg/infra/cyg_type.h>
+#include<cyg/infra/cyg_trac.h>          // tracing macros
+#include<cyg/infra/cyg_ass.h>           // assertion macros
+
+#include<cyg/hal/hal_arch.h>            // HAL header
+#include<cyg/hal/hal_intr.h>            // HAL header
+
+static inline void hal_gpio_init(void);
+
+// DATA and BSS locations
+__externC cyg_uint32 __ram_data_start;
+__externC cyg_uint32 __ram_data_end;
+__externC cyg_uint32 __rom_data_start;
+__externC cyg_uint32 __sram_data_start;
+__externC cyg_uint32 __sram_data_end;
+__externC cyg_uint32 __srom_data_start;
+__externC cyg_uint32 __bss_start;
+__externC cyg_uint32 __bss_end;
+
+
+//==========================================================================
+// System init
+//
+// This is run to set up the basic system, including GPIO setting,
+// clock feeds, power supply, and memory initialization. This code
+// runs before the DATA is copied from ROM and the BSS cleared, hence
+// it cannot make use of static variables or data tables.
+
+__externC void CYGOPT_HAL_KINETIS_MISC_FLASH_SECTION_ATTR
+hal_system_init( void )
+{
+#if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_SRAM)
+    hal_wdog_disable();
+    hal_gpio_init();
+#endif
+#if defined(CYG_HAL_STARTUP_SRAM)&&  !defined(CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED)
+    // Note: For CYG_HAL_STARTUP_SRAM, the SRAM_L bank simulates ROM
+    // Relocate data from ROM to RAM
+    {
+        register cyg_uint32 *ram_p, *rom_p;
+        for( ram_p =&__ram_data_start, rom_p =&__rom_data_start;
+             ram_p<  &__ram_data_end;
+             ram_p++, rom_p++ )
+            *ram_p = *rom_p;
+    }
+
+    // Relocate data from ROM to SRAM
+    {
+        register cyg_uint32 *ram_p, *sram_p;
+        for( ram_p =&__sram_data_start, sram_p =&__srom_data_start;
+             ram_p<  &__sram_data_end;
+             ram_p++, sram_p++ )
+            *ram_p = *sram_p;
+    }
+#endif
+}
+
+//===========================================================================
+// hal_gpio_init
+//===========================================================================
+static inline void CYGOPT_HAL_KINETIS_MISC_FLASH_SECTION_ATTR
+hal_gpio_init(void)
+{
+    cyghwr_hal_kinetis_sim_t *sim_p = CYGHWR_HAL_KINETIS_SIM_P;
+    cyghwr_hal_kinetis_mpu_t *mpu_p = CYGHWR_HAL_KINETIS_MPU_P;
+
+    // Enable clocks on all ports.
+    sim_p->scgc1 = CYGHWR_HAL_KINETIS_SIM_SCGC1_ALL_M;
+    sim_p->scgc2 = CYGHWR_HAL_KINETIS_SIM_SCGC2_ALL_M;
+    sim_p->scgc3 = CYGHWR_HAL_KINETIS_SIM_SCGC3_ALL_M;
+    sim_p->scgc4 = CYGHWR_HAL_KINETIS_SIM_SCGC4_ALL_M;
+    sim_p->scgc5 = CYGHWR_HAL_KINETIS_SIM_SCGC5_ALL_M;
+    sim_p->scgc6 = CYGHWR_HAL_KINETIS_SIM_SCGC6_ALL_M;
+    sim_p->scgc7 = CYGHWR_HAL_KINETIS_SIM_SCGC7_ALL_M;
+
+    // Disable MPU
+    mpu_p->cesr = 0;
+}
+
+
+
+//==========================================================================
+
+__externC void hal_platform_init( void )
+{
+}
+
+//==========================================================================
+
+#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
+
+#include CYGHWR_MEMORY_LAYOUT_H
+
+//--------------------------------------------------------------------------
+// Accesses to areas not backed by real devices or memory can cause
+// the CPU to hang.
+//
+// The following table defines the memory areas that GDB is allowed to
+// touch. All others are disallowed.
+// This table needs to be kept up to date with the set of memory areas
+// that are available on the board.
+
+static struct {
+    CYG_ADDRESS         start;          // Region start address
+    CYG_ADDRESS         end;            // End address (last byte)
+} hal_data_access[] =
+{
+    { CYGMEM_REGION_ram,        CYGMEM_REGION_ram+CYGMEM_REGION_ram_SIZE-1      },      // Main RAM
+#ifdef CYGMEM_REGION_sram
+    { CYGMEM_REGION_sram,       CYGMEM_REGION_sram+CYGMEM_REGION_sram_SIZE-1    },      // On-chip SRAM
+#endif
+#ifdef CYGMEM_REGION_flash
+    { CYGMEM_REGION_flash,      CYGMEM_REGION_flash+CYGMEM_REGION_flash_SIZE-1  },      // On-chip flash
+#endif
+#ifdef CYGMEM_REGION_rom
+    { CYGMEM_REGION_rom,        CYGMEM_REGION_rom+CYGMEM_REGION_rom_SIZE-1      },      // External flash
+#endif
+    { 0xE0000000,               0x00000000-1                                    },      // Cortex-M peripherals
+    { 0x40000000,               0x60000000-1                                    },      // Chip specific peripherals
+};
+
+__externC int cyg_hal_stub_permit_data_access( CYG_ADDRESS addr, cyg_uint32 count )
+{
+    int i;
+    for( i = 0; i<  sizeof(hal_data_access)/sizeof(hal_data_access[0]); i++ ) {
+        if( (addr>= hal_data_access[i].start)&&
+            (addr+count)<= hal_data_access[i].end)
+            return true;
+    }
+    return false;
+}
+
+#endif // CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
+
+//==========================================================================
+
+#ifdef CYGPKG_REDBOOT
+#include<redboot.h>
+#include CYGHWR_MEMORY_LAYOUT_H
+
+//--------------------------------------------------------------------------
+// Memory layout
+//
+// We report the on-chip SRAM and external SRAM.
+
+void
+cyg_plf_memory_segment(int seg, unsigned char **start, unsigned char **end)
+{
+    switch (seg) {
+    case 0:
+        *start = (unsigned char *)CYGMEM_REGION_ram;
+        *end = (unsigned char *)(CYGMEM_REGION_ram + CYGMEM_REGION_ram_SIZE);
+        break;
+#ifdef CYGMEM_REGION_sram
+    case 1:
+        *start = (unsigned char *)CYGMEM_REGION_sram;
+        *end = (unsigned char *)(CYGMEM_REGION_sram + CYGMEM_REGION_sram_SIZE);
+        break;
+#endif
+    default:
+        *start = *end = NO_MEMORY;
+        break;
+    }
+} // cyg_plf_memory_segment()
+
+#endif // CYGPKG_REDBOOT
+
+
+//==========================================================================
+// EOF twr_k70f120m_misc.c
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/var/current/cdl/hal_cortexm_kinetis.cdl ecos-3.0/packages/hal/cortexm/kinetis/var/current/cdl/hal_cortexm_kinetis.cdl
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/var/current/cdl/hal_cortexm_kinetis.cdl	2012-01-03 14:14:53.436126755 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/var/current/cdl/hal_cortexm_kinetis.cdl	2012-01-03 13:40:26.134971576 +0700
@@ -90,7 +90,7 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS {
          cdl_option CYGHWR_HAL_CORTEXM_KINETIS_SUBFAM {
              display          "Sub-family"
              flavor           data
-            default_value    { 60 }
+            default_value    { 70 }
              legal_values     { 10 20 30 40 50 60 70 }
              description "
                  Kinetis family consists of several sub-families differing by
@@ -108,7 +108,7 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS {
          cdl_option CYGHWR_HAL_CORTEXM_KINETIS_FLASH_NAME {
              display "Flash name segment"
              flavor           data
-            default_value    { 512 }
+            default_value    { "1M0" }
              legal_values     { 32 64 96 128 256 512 "1M0" }
              description   "
                  Flash size is represented in part name encoded as KiB
@@ -345,7 +345,7 @@ cdl_package CYGPKG_HAL_CORTEXM_KINETIS {
      cdl_option CYGHWR_HAL_CORTEXM_KINETIS_SRAM_UNIFIED {
          display  "Unified on chip SRAM region"
          flavor   bool
-        default_value    { 1 }
+        default_value    { 0 }
          description "
              Kinetis have two equal SRAM banks SRAM_L and SRAM_U that
              occupy consecutive memory blocks with \(possibility for
diff -rupN ecos-3.0-orgi/packages/hal/cortexm/kinetis/var/current/include/var_io.h ecos-3.0/packages/hal/cortexm/kinetis/var/current/include/var_io.h
--- ecos-3.0-orgi/packages/hal/cortexm/kinetis/var/current/include/var_io.h	2012-01-03 14:14:53.437126743 +0700
+++ ecos-3.0/packages/hal/cortexm/kinetis/var/current/include/var_io.h	2012-01-03 14:06:04.899734370 +0700
@@ -654,6 +654,8 @@ typedef volatile struct cyghwr_hal_kinet
  #define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTD_S           12
  #define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_M           0x2000
  #define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_S           13
+#define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTF_M           0x4000
+#define CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTF_S           14

  #define CYGHWR_HAL_KINETIS_SIM_SCGC5_ALL_M            \
              (CYGHWR_HAL_KINETIS_SIM_SCGC5_LPTIMER_M | \
@@ -663,7 +665,8 @@ typedef volatile struct cyghwr_hal_kinet
               CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTB_M |   \
               CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTC_M |   \
               CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTD_M |   \
-             CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_M)
+             CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTE_M |   \
+			 CYGHWR_HAL_KINETIS_SIM_SCGC5_PORTF_M )

  // SCGC6 Bit Fields
  #define CYGHWR_HAL_KINETIS_SIM_SCGC6_FTFL_M            0x1
@@ -824,11 +827,12 @@ typedef volatile struct cyghwr_hal_kinet
  #define CYGHWR_HAL_KINETIS_PORTC_P  (cyghwr_hal_kinetis_port_t *)0x4004B000
  #define CYGHWR_HAL_KINETIS_PORTD_P  (cyghwr_hal_kinetis_port_t *)0x4004C000
  #define CYGHWR_HAL_KINETIS_PORTE_P  (cyghwr_hal_kinetis_port_t *)0x4004D000
+#define CYGHWR_HAL_KINETIS_PORTF_P  (cyghwr_hal_kinetis_port_t *)0x4004E000

  enum {
      CYGHWR_HAL_KINETIS_PORTA, CYGHWR_HAL_KINETIS_PORTB,
      CYGHWR_HAL_KINETIS_PORTC, CYGHWR_HAL_KINETIS_PORTD,
-    CYGHWR_HAL_KINETIS_PORTE
+    CYGHWR_HAL_KINETIS_PORTE, CYGHWR_HAL_KINETIS_PORTF
  };

  // PCR Bit Fields




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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Ilija Kocho]

On 05.01.2012 11:38, Linh Nguyá»…n wrote:
> Hi all,
> Thanks for your replies. Currently, I don't understand about DDRAM of 
> K70. Do I need configure DDRAM session in linker file, or doing 
> somethings with DDRAM? K60 board does not have DDRAM, so where kernel 
> will be loaded when booting?ote

You shall need linker script with a region and section for DDRAM indeed. 
Also you will need some code for initialization of DDR controller and 
possibly DDRAM chip.

Ilija

Little technical note: eCos mailing list filter permits only plain text 
so your HTML formatted mail has been rejected. In order to pass through 
instruct your e-mail client for plain text format when sending to eCos 
mailing list.
>
> 2012/1/4 Morris, Richard <Richard.Morris@lifetech.com 
> <mailto:Richard.Morris@lifetech.com>>
>
>     Hi All,
>
>     Regarding using J-Link and Ecos.
>
>     I use J-Link with eCos and ARM processors.   I have used it with
>     the Kinetis K60, the NXP LPC2xxx family, Atmel AT91SAM family.
>
>     My configuration is:
>     Ubuntu Host 10.04
>     Eclipse 3.6
>     Zylin CDT Plugin (http://opensource.zylin.com/embeddedcdt.html)
>     GCC compiler:  provided with eCos or CodeSourcery's
>     Segger's GDB Server (running on Linux or Windows)
>     Segger's J-Link and/or J-Link Pro
>
>     Regards,
>
>     Richard
>
>
>
>
>     On Jan 3, 2012, at 6:01 AM, Ilija Kocho wrote:
>
>>     Hello Linh
>>
>>     Thank you for your interest in eCos for Kinetis. First I would invite
>>     you to post your comments and questions to some of eCos mailing
>>     lists:
>>     http://ecos.sourceware.org/intouch.html The benefit is both for
>>     community and you, for instance I have no experience with J-Link, but
>>     somebody else may have.
>>
>>     Regarding your attempt to run eCos on K70, apparently you are luckier
>>     than me :) as you already got a K70 tower.
>>     I am waiting for my K70 tower so I haven't been able to play with
>>     K70 so
>>     far, but from K70 RM I can assume that variant HAL may need some
>>     changes
>>     (Clocking, etc.) in order to become compatible with K70.
>>
>>     Regarding your code: I would avoid changing variant default settings,
>>     you can achieve similar effect by stating requirements in
>>     platform HAL,
>>     Please look at K40 CDL.
>>
>>     Regards
>>     Ilija
>>
>>
>>     On 03.01.2012 09:00, Linh Nguyá»…n wrote:
>>>     Dear Kocho,
>>>
>>>     Currently, I porting Redboot from TWR K60 to K70. I have used source
>>>     code from http://hg-pub.ecoscentric.com/ecos/. The attach files are
>>>     patch for TWR K70 and eCos config file for k70-redboot. Redboot for
>>>     K70 can build, but it can not run after download by IAR workbench
>>>     through J-Link. Can you spend some free times to get overview on it,
>>>     then give me your comments please. Thanks so much and have nice
>>>     week.
>>>
>>>     I'm looking forward to hearing from you.
>>>
>>>     Thanks & Regards,
>>>     Linh Nguyen
>>     --
>>     Before posting, please read the FAQ:
>>     http://ecos.sourceware.org/fom/ecos
>>     and search the list archive:
>>     http://ecos.sourceware.org/ml/ecos-discuss
>>
>
>     Richard Morris
>     *Senior Staff Firmware Engineer*
>
>     *T*  650.638.6883
>     850 Lincoln Centre Dr
>     MS 407-1
>     Foster City, CA 94404
>     USA
>     http://www.lifetechnologies.com <http://www.lifetechnologies.com/>
>
>
>
>     This email and its attachments are confidential. If you received
>     this email in error, please notify the sender and delete.
>
>
>
>


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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Linh Nguyễn]

Hi Kocho, Morris and all,

Firstly thanks Kocho for your guide. I have initialized SDRAM
controller & add SDRAM region into linker script. Currently, I can
access SDRAM.

Now I have one question. Why my Redboot does not contain "go" & "exec"
commands? Which component of eCos implements these commands?

Have a nice weekend.

Thanks & Regards,
Linh Nguyen

On Fri, Jan 6, 2012 at 7:29 PM, Ilija Kocho <ilijak@siva.com.mk> wrote:
> On 05.01.2012 11:38, Linh Nguyễn wrote:
>>
>> Hi all,
>> Thanks for your replies. Currently, I don't understand about DDRAM of K70.
>> Do I need configure DDRAM session in linker file, or doing somethings with
>> DDRAM? K60 board does not have DDRAM, so where kernel will be loaded when
>> booting?ote
>
>
> You shall need linker script with a region and section for DDRAM indeed.
> Also you will need some code for initialization of DDR controller and
> possibly DDRAM chip.
>
> Ilija
>
> Little technical note: eCos mailing list filter permits only plain text so
> your HTML formatted mail has been rejected. In order to pass through
> instruct your e-mail client for plain text format when sending to eCos
> mailing list.
>>
>>
>> 2012/1/4 Morris, Richard <Richard.Morris@lifetech.com
>> <mailto:Richard.Morris@lifetech.com>>
>>
>>
>>    Hi All,
>>
>>    Regarding using J-Link and Ecos.
>>
>>    I use J-Link with eCos and ARM processors.   I have used it with
>>    the Kinetis K60, the NXP LPC2xxx family, Atmel AT91SAM family.
>>
>>    My configuration is:
>>    Ubuntu Host 10.04
>>    Eclipse 3.6
>>    Zylin CDT Plugin (http://opensource.zylin.com/embeddedcdt.html)
>>    GCC compiler:  provided with eCos or CodeSourcery's
>>    Segger's GDB Server (running on Linux or Windows)
>>    Segger's J-Link and/or J-Link Pro
>>
>>    Regards,
>>
>>    Richard
>>
>>
>>
>>
>>    On Jan 3, 2012, at 6:01 AM, Ilija Kocho wrote:
>>
>>>    Hello Linh
>>>
>>>    Thank you for your interest in eCos for Kinetis. First I would invite
>>>    you to post your comments and questions to some of eCos mailing
>>>    lists:
>>>    http://ecos.sourceware.org/intouch.html The benefit is both for
>>>    community and you, for instance I have no experience with J-Link, but
>>>    somebody else may have.
>>>
>>>    Regarding your attempt to run eCos on K70, apparently you are luckier
>>>    than me :) as you already got a K70 tower.
>>>    I am waiting for my K70 tower so I haven't been able to play with
>>>    K70 so
>>>    far, but from K70 RM I can assume that variant HAL may need some
>>>    changes
>>>    (Clocking, etc.) in order to become compatible with K70.
>>>
>>>    Regarding your code: I would avoid changing variant default settings,
>>>    you can achieve similar effect by stating requirements in
>>>    platform HAL,
>>>    Please look at K40 CDL.
>>>
>>>    Regards
>>>    Ilija
>>>
>>>
>>>    On 03.01.2012 09:00, Linh Nguyễn wrote:
>>>>
>>>>    Dear Kocho,
>>>>
>>>>    Currently, I porting Redboot from TWR K60 to K70. I have used source
>>>>    code from http://hg-pub.ecoscentric.com/ecos/. The attach files are
>>>>    patch for TWR K70 and eCos config file for k70-redboot. Redboot for
>>>>    K70 can build, but it can not run after download by IAR workbench
>>>>    through J-Link. Can you spend some free times to get overview on it,
>>>>    then give me your comments please. Thanks so much and have nice
>>>>    week.
>>>>
>>>>    I'm looking forward to hearing from you.
>>>>
>>>>    Thanks & Regards,
>>>>    Linh Nguyen
>>>
>>>    --
>>>    Before posting, please read the FAQ:
>>>    http://ecos.sourceware.org/fom/ecos
>>>    and search the list archive:
>>>    http://ecos.sourceware.org/ml/ecos-discuss
>>>
>>
>>    Richard Morris
>>    *Senior Staff Firmware Engineer*
>>
>>    *T*  650.638.6883
>>
>>    850 Lincoln Centre Dr
>>    MS 407-1
>>    Foster City, CA 94404
>>    USA
>>    http://www.lifetechnologies.com <http://www.lifetechnologies.com/>
>>
>>
>>
>>
>>    This email and its attachments are confidential. If you received
>>    this email in error, please notify the sender and delete.
>>
>>
>>
>>
>

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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Ilija Kocho]

On 07.01.2012 04:05, Linh Nguyá»…n wrote:
> Hi Kocho, Morris and all,
>
> Firstly thanks Kocho for your guide. I have initialized SDRAM
> controller&  add SDRAM region into linker script. Currently, I can
> access SDRAM.

I'm glad to know that and I would appreciate some feedback.

>
> Now I have one question. Why my Redboot does not contain "go"&  "exec"
> commands? Which component of eCos implements these commands?

"go" should be there, what error message do you get?
Regarding "exec", Linux loading is not supported, Kinetis has no MMU anyway.

Ilija

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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Linh Nguyễn]

Opps, my fail. "go" command occurs ^^!.

About "exec" command. Does it require MMU to load Linux kernel?
http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
this link said that uClinux & u-boot can run with *NON MMU* ARM
processors. Do you have any ways to run bootloader and Linux kernel
(uClinux) on *NON MMU* ARM??? Thanks so much.

On Sat, Jan 7, 2012 at 4:45 PM, Ilija Kocho <ilijak@siva.com.mk> wrote:
> On 07.01.2012 04:05, Linh Nguyễn wrote:
>>
>> Hi Kocho, Morris and all,
>>
>> Firstly thanks Kocho for your guide. I have initialized SDRAM
>> controller&  add SDRAM region into linker script. Currently, I can
>> access SDRAM.
>
>
> I'm glad to know that and I would appreciate some feedback.
>
>
>>
>> Now I have one question. Why my Redboot does not contain "go"&  "exec"
>> commands? Which component of eCos implements these commands?
>
>
> "go" should be there, what error message do you get?
> Regarding "exec", Linux loading is not supported, Kinetis has no MMU anyway.
>
> Ilija
>
>
> --
> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>

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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Ilija Kocho]

On 07.01.2012 11:35, Linh Nguyá»…n wrote:
> Opps, my fail. "go" command occurs ^^!.
>
> About "exec" command. Does it require MMU to load Linux kernel?
> http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
> this link said that uClinux&  u-boot can run with *NON MMU* ARM
> processors. Do you have any ways to run bootloader and Linux kernel
> (uClinux) on *NON MMU* ARM??? Thanks so much.
Not at the moment.
I wonder if uClinux has being ported to Kinetis? Any reference?

Ilija


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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Linh Nguyễn]

http://www.linux-arm.org/LinuxKernel/LinuxM3 this is the link about
Linux kernel for Cortex M3. I don't know much about ARM but I think
Cortex M3 and M4 is not much different.

http://www.cnx-software.com/2011/12/30/linux-for-cortex-m3-m4-microcontrollers/
this link said that "EmCraft also sells Linux BSP (for 99 USD –
software only) for STMicroelectronics STM32F2, NXP NXP LPC1788
(Cortex M3) and Freescale Kinetis (Cortex M4) development boards.".

So why uClinux can not port to Kinetis K70?

On Tue, Jan 10, 2012 at 4:37 AM, Ilija Kocho <ilijak@siva.com.mk> wrote:
> On 07.01.2012 11:35, Linh Nguyễn wrote:
>>
>> Opps, my fail. "go" command occurs ^^!.
>>
>> About "exec" command. Does it require MMU to load Linux kernel?
>> http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
>> this link said that uClinux&  u-boot can run with *NON MMU* ARM
>>
>> processors. Do you have any ways to run bootloader and Linux kernel
>> (uClinux) on *NON MMU* ARM??? Thanks so much.
>
> Not at the moment.
> I wonder if uClinux has being ported to Kinetis? Any reference?
>
>
> Ilija
>
>
> --
> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>

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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Ilija Kocho]

Linh

Thank you for references.oreo

On 10.01.2012 03:38, Linh Nguyá»…n wrote:
> http://www.linux-arm.org/LinuxKernel/LinuxM3 this is the link about
> Linux kernel for Cortex M3. I don't know much about ARM but I think
> Cortex M3 and M4 is not much different.

Something being ported to Cortex-M architecture is a big step but it 
does not mean that it is ported to some hardware, being it  Kinetis, 
STM32, LPC, etc. There's still some work (although not too much) such as 
basic hw initialization, clocking, some serial driver, etc.

>
> http://www.cnx-software.com/2011/12/30/linux-for-cortex-m3-m4-microcontrollers/
> this link said that "EmCraft also sells Linux BSP (for 99 USD –
> software only) for STMicroelectronics STM32F2, NXP NXP LPC1788
> (Cortex M3) and Freescale Kinetis (Cortex M4) development boards.".

This looks promising although information is incomplete, they don't 
mention on what hardware to run uClinux for Kinetis and I guess 
TWR-K60N512 has too little memory. Of course TWR-K70 has more than enough.

>
> So why uClinux can not port to Kinetis K70?
I haven't stated that. I merely asked for information on such port. 
Thanks again for information.

Ilija

On Tue, Jan 10, 2012 at 4:37 AM, Ilija Kocho <ilijak@siva.com.mk> wrote:
>> On 07.01.2012 11:35, Linh Nguyá»…n wrote:
>>> Opps, my fail. "go" command occurs ^^!.
>>>
>>> About "exec" command. Does it require MMU to load Linux kernel?
>>> http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
>>> this link said that uClinux&    u-boot can run with *NON MMU* ARM
>>>
>>> processors. Do you have any ways to run bootloader and Linux kernel
>>> (uClinux) on *NON MMU* ARM??? Thanks so much.
>> Not at the moment.
>> I wonder if uClinux has being ported to Kinetis? Any reference?
>>
>>
>> Ilija
>>
>>
>> --
>> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
>> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>>


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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Linh Nguyễn]

Dear all,
Good news. I have found and downloaded the Linux 2.6 kernel for
Cortex-M (currently is M3 for STM32F2, LPC1788, ARM fusion A2F) and
built successfully. I can porting to Cortex-M4 based on this kernel.
This is the link:
http://www.emcraft.com/index.php/component/jdownloads/view.download/6/8
or
http://www.emcraft.com/index.php/technology/98    (file name:
a2f-linux-linux-2.6.tar.bz2)

Thanks & Regards,
Linh Nguyen

On Tue, Jan 10, 2012 at 3:03 PM, Ilija Kocho <ilijak@siva.com.mk> wrote:
> Linh
>
> Thank you for references.oreo
>
>
> On 10.01.2012 03:38, Linh Nguyễn wrote:
>>
>> http://www.linux-arm.org/LinuxKernel/LinuxM3 this is the link about
>> Linux kernel for Cortex M3. I don't know much about ARM but I think
>> Cortex M3 and M4 is not much different.
>
>
> Something being ported to Cortex-M architecture is a big step but it does
> not mean that it is ported to some hardware, being it  Kinetis, STM32, LPC,
> etc. There's still some work (although not too much) such as basic hw
> initialization, clocking, some serial driver, etc.
>
>
>>
>>
>> http://www.cnx-software.com/2011/12/30/linux-for-cortex-m3-m4-microcontrollers/
>> this link said that "EmCraft also sells Linux BSP (for 99 USD –
>> software only) for STMicroelectronics STM32F2, NXP NXP LPC1788
>> (Cortex M3) and Freescale Kinetis (Cortex M4) development boards.".
>
>
> This looks promising although information is incomplete, they don't mention
> on what hardware to run uClinux for Kinetis and I guess TWR-K60N512 has too
> little memory. Of course TWR-K70 has more than enough.
>
>
>>
>> So why uClinux can not port to Kinetis K70?
>
> I haven't stated that. I merely asked for information on such port. Thanks
> again for information.
>
> Ilija
>
>
> On Tue, Jan 10, 2012 at 4:37 AM, Ilija Kocho <ilijak@siva.com.mk> wrote:
>>>
>>> On 07.01.2012 11:35, Linh Nguyễn wrote:
>>>>
>>>> Opps, my fail. "go" command occurs ^^!.
>>>>
>>>> About "exec" command. Does it require MMU to load Linux kernel?
>>>> http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
>>>> this link said that uClinux&    u-boot can run with *NON MMU* ARM
>>>>
>>>> processors. Do you have any ways to run bootloader and Linux kernel
>>>> (uClinux) on *NON MMU* ARM??? Thanks so much.
>>>
>>> Not at the moment.
>>> I wonder if uClinux has being ported to Kinetis? Any reference?
>>>
>>>
>>> Ilija
>>>
>>>
>>> --
>>> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
>>> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>>>
>
>
> --
> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>

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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Ilija Kocho]

On 02.02.2012 09:55, Linh Nguyá»…n wrote:
> Dear all,
> Good news. I have found and downloaded the Linux 2.6 kernel for
> Cortex-M (currently is M3 for STM32F2, LPC1788, ARM fusion A2F) and
> built successfully. I can porting to Cortex-M4 based on this kernel.
> This is the link:
> http://www.emcraft.com/index.php/component/jdownloads/view.download/6/8
> or
> http://www.emcraft.com/index.php/technology/98    (file name:
> a2f-linux-linux-2.6.tar.bz2)

Thank you for pointing this out Linh.

Ilija


>
> Thanks&  Regards,
> Linh Nguyen
>
> On Tue, Jan 10, 2012 at 3:03 PM, Ilija Kocho<ilijak@siva.com.mk>  wrote:
>> Linh
>>
>> Thank you for references.oreo
>>
>>
>> On 10.01.2012 03:38, Linh Nguyá»…n wrote:
>>> http://www.linux-arm.org/LinuxKernel/LinuxM3 this is the link about
>>> Linux kernel for Cortex M3. I don't know much about ARM but I think
>>> Cortex M3 and M4 is not much different.
>>
>> Something being ported to Cortex-M architecture is a big step but it does
>> not mean that it is ported to some hardware, being it  Kinetis, STM32, LPC,
>> etc. There's still some work (although not too much) such as basic hw
>> initialization, clocking, some serial driver, etc.
>>
>>
>>>
>>> http://www.cnx-software.com/2011/12/30/linux-for-cortex-m3-m4-microcontrollers/
>>> this link said that "EmCraft also sells Linux BSP (for 99 USD –
>>> software only) for STMicroelectronics STM32F2, NXP NXP LPC1788
>>> (Cortex M3) and Freescale Kinetis (Cortex M4) development boards.".
>>
>> This looks promising although information is incomplete, they don't mention
>> on what hardware to run uClinux for Kinetis and I guess TWR-K60N512 has too
>> little memory. Of course TWR-K70 has more than enough.
>>
>>
>>> So why uClinux can not port to Kinetis K70?
>> I haven't stated that. I merely asked for information on such port. Thanks
>> again for information.
>>
>> Ilija
>>
>>
>> On Tue, Jan 10, 2012 at 4:37 AM, Ilija Kocho<ilijak@siva.com.mk>  wrote:
>>>> On 07.01.2012 11:35, Linh Nguyá»…n wrote:
>>>>> Opps, my fail. "go" command occurs ^^!.
>>>>>
>>>>> About "exec" command. Does it require MMU to load Linux kernel?
>>>>> http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
>>>>> this link said that uClinux&      u-boot can run with *NON MMU* ARM
>>>>>
>>>>> processors. Do you have any ways to run bootloader and Linux kernel
>>>>> (uClinux) on *NON MMU* ARM??? Thanks so much.
>>>> Not at the moment.
>>>> I wonder if uClinux has being ported to Kinetis? Any reference?
>>>>
>>>>
>>>> Ilija
>>>>
>>>>
>>>> --
>>>> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
>>>> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>>>>
>>
>> --
>> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
>> and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
>>


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Re: [ECOS] Re: Redboot for Kinetis TWR-K70F120M

[Linh Nguyễn]

Really good news for K70. Emcraft has released Linux kernel for K70.
The link is http://www.emcraft.com/index.php/technology/98 (file name:
linux-cortexm-linux-2.6.tar.bz2).

I'm checking it.

On Sat, Feb 4, 2012 at 5:31 AM, Ilija Kocho <ilijak@siva.com.mk> wrote:
> On 02.02.2012 09:55, Linh Nguyễn wrote:
>>
>> Dear all,
>> Good news. I have found and downloaded the Linux 2.6 kernel for
>> Cortex-M (currently is M3 for STM32F2, LPC1788, ARM fusion A2F) and
>> built successfully. I can porting to Cortex-M4 based on this kernel.
>> This is the link:
>> http://www.emcraft.com/index.php/component/jdownloads/view.download/6/8
>> or
>> http://www.emcraft.com/index.php/technology/98    (file name:
>> a2f-linux-linux-2.6.tar.bz2)
>
>
> Thank you for pointing this out Linh.
>
> Ilija
>
>
>>
>> Thanks&  Regards,
>>
>> Linh Nguyen
>>
>> On Tue, Jan 10, 2012 at 3:03 PM, Ilija Kocho<ilijak@siva.com.mk>  wrote:
>>>
>>> Linh
>>>
>>> Thank you for references.oreo
>>>
>>>
>>> On 10.01.2012 03:38, Linh Nguyễn wrote:
>>>>
>>>> http://www.linux-arm.org/LinuxKernel/LinuxM3 this is the link about
>>>> Linux kernel for Cortex M3. I don't know much about ARM but I think
>>>> Cortex M3 and M4 is not much different.
>>>
>>>
>>> Something being ported to Cortex-M architecture is a big step but it does
>>> not mean that it is ported to some hardware, being it  Kinetis, STM32,
>>> LPC,
>>> etc. There's still some work (although not too much) such as basic hw
>>> initialization, clocking, some serial driver, etc.
>>>
>>>
>>>>
>>>>
>>>> http://www.cnx-software.com/2011/12/30/linux-for-cortex-m3-m4-microcontrollers/
>>>> this link said that "EmCraft also sells Linux BSP (for 99 USD –
>>>> software only) for STMicroelectronics STM32F2, NXP NXP LPC1788
>>>> (Cortex M3) and Freescale Kinetis (Cortex M4) development boards.".
>>>
>>>
>>> This looks promising although information is incomplete, they don't
>>> mention
>>> on what hardware to run uClinux for Kinetis and I guess TWR-K60N512 has
>>> too
>>> little memory. Of course TWR-K70 has more than enough.
>>>
>>>
>>>> So why uClinux can not port to Kinetis K70?
>>>
>>> I haven't stated that. I merely asked for information on such port.
>>> Thanks
>>> again for information.
>>>
>>> Ilija
>>>
>>>
>>> On Tue, Jan 10, 2012 at 4:37 AM, Ilija Kocho<ilijak@siva.com.mk>  wrote:
>>>>>
>>>>> On 07.01.2012 11:35, Linh Nguyễn wrote:
>>>>>>
>>>>>> Opps, my fail. "go" command occurs ^^!.
>>>>>>
>>>>>> About "exec" command. Does it require MMU to load Linux kernel?
>>>>>> http://www.arm.com/community/software-enablement/linux.php?tab=uClinux
>>>>>> this link said that uClinux&      u-boot can run with *NON MMU* ARM
>>>>>>
>>>>>> processors. Do you have any ways to run bootloader and Linux kernel
>>>>>> (uClinux) on *NON MMU* ARM??? Thanks so much.
>>>>>
>>>>> Not at the moment.
>>>>> I wonder if uClinux has being ported to Kinetis? Any reference?
>>>>>
>>>>>
>>>>> Ilija
>>>>>
>>>>>
>>>>> --
>>>>> Before posting, please read the FAQ:
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>>>>>
>>>
>>> --
>>> Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos
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>>>
>

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