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* [ECOS] DSR problem
@ 2002-07-11  3:38 Vinayak P Risbud
  2002-07-11 18:53 ` Hiroyasu Shimizu
  0 siblings, 1 reply; 2+ messages in thread
From: Vinayak P Risbud @ 2002-07-11  3:38 UTC (permalink / raw)
  To: Ecos-Discuss

    I have some queries, regarding DSR on ARM e7t board.

    1.  Do we need ecos kernel to process DSR ?
    2.  When I receive a character on serial port, my tx
         ISR returns, CYG_ISR_CALL_DSR
    3.  But the DSR are not called at all.
    4.  Can any one, explain me,  who takes care of
         calling DSR's in the absence of ECOS kernel

    Thank in advance
            Vinayak



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^ permalink raw reply	[flat|nested] 2+ messages in thread

* RE: [ECOS] DSR problem
  2002-07-11  3:38 [ECOS] DSR problem Vinayak P Risbud
@ 2002-07-11 18:53 ` Hiroyasu Shimizu
  0 siblings, 0 replies; 2+ messages in thread
From: Hiroyasu Shimizu @ 2002-07-11 18:53 UTC (permalink / raw)
  To: Ecos-Discuss

    1.  Do we need ecos kernel to process DSR ?

Yes, at least you should select CYGPKG_KERNEL and
CYGFUN_HAL_COMMON_KERNEL_SUPPORT in standard configuration(see also
vectors.S file).

    2.  When I receive a character on serial port, my tx
         ISR returns, CYG_ISR_CALL_DSR

Unless you include eCos kernel package, basic package only support ISR and C
driver API services.

    3.  But the DSR are not called at all.

dito.

    4.  Can any one, explain me,  who takes care of
         calling DSR's in the absence of ECOS kernel

In my case, i simply insert following line into vector.S to enable calling
interrupt_end function which implement DSR service.

#define CYGFUN_HAL_COMMON_KERNEL_SUPPORT     // hack to add DSR support in
basic package
#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
        // The return value from the handler (in r0) will indicate whether a
        // DSR is to be posted. Pass this together with a pointer to the
        // interrupt object we have just used to the interrupt tidy up
routine.

                              // don't run this for spurious interrupts!
        cmp     v1,#CYGNUM_HAL_INTERRUPT_NONE
        beq     l17f
        ldr     r1,.hal_interrupt_objects
        ldr     r1,[r1,v1,lsl #2]
        mov     r2,v6           // register frame

        THUMB_MODE(r3,10)

        bl      interrupt_end   // post any bottom layer handler
                                // threads and call scheduler
        ARM_MODE(r1,10)
	.global l17f
l17f:
#endif

It's work well.

Regards,

H.Shimizu


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^ permalink raw reply	[flat|nested] 2+ messages in thread

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2002-07-11  3:38 [ECOS] DSR problem Vinayak P Risbud
2002-07-11 18:53 ` Hiroyasu Shimizu

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