* [ECOS] Interrupt Handler
@ 2002-07-10 7:24 Vinayak P Risbud
2002-07-10 8:21 ` Robert Cragie
0 siblings, 1 reply; 4+ messages in thread
From: Vinayak P Risbud @ 2002-07-10 7:24 UTC (permalink / raw)
To: Ecos-Discuss
[-- Attachment #1: Type: text/plain, Size: 471 bytes --]
Hi,
I have attatched my some part of redboot.elf
disassembled file.
I am not able to follow, how exactly my ISR is
called upon reception of an interrupt.
What I know is, upon IRQ, the control jumps to 0x0018.
I am not able to follow, how exactly, my ISR which is
present at 0x129ac is called ?
can any one explain me the exact flow ?
Thanks
Vinayak
[-- Attachment #2: dump --]
[-- Type: text/plain, Size: 16835 bytes --]
./redboot.elf: file format elf32-littlearm
Disassembly of section .rom_vectors:
00010000 <__exception_handlers>:
10000: e59ff018 ldr pc, [pc, #18] ; 10020 <vectors>
10004: e59ff018 ldr pc, [pc, #18] ; 10024 <.undefined_instruction>
10008: e59ff018 ldr pc, [pc, #18] ; 10028 <.software_interrupt>
1000c: e59ff018 ldr pc, [pc, #18] ; 1002c <.abort_prefetch>
10010: e59ff018 ldr pc, [pc, #18] ; 10030 <.abort_data>
10014: 00000000 andeq r0, r0, r0
10018: e59ff018 ldr pc, [pc, #18] ; 10038 <.IRQ>
1001c: e59ff018 ldr pc, [pc, #18] ; 1003c <.FIQ>
00010020 <vectors>:
10020: 00010040 andeq r0, r1, r0, asr #32
00010024 <.undefined_instruction>:
10024: 00010190 muleq r1, r0, r1
00010028 <.software_interrupt>:
10028: 000101f8 streqsh r0, [r1], -r8
0001002c <.abort_prefetch>:
1002c: 00010230 andeq r0, r1, r0, lsr r2
00010030 <.abort_data>:
10030: 00010290 muleq r1, r0, r2
10034: 00000000 andeq r0, r0, r0
00010038 <.IRQ>:
10038: 0001037c andeq r0, r1, r12, ror r3
0001003c <.FIQ>:
1003c: 00010344 andeq r0, r1, r4, asr #6
Disassembly of section .text:
00010040 <reset_vector>:
10040: e10f7000 mrs r7, CPSR
10044: e207701f and r7, r7, #31 ; 0x1f
10048: e3570013 cmp r7, #19 ; 0x13
1004c: 0a00000a beq 1007c <start>
10050: e59f046c ldr r0, [pc, #46c] ; 104c4 <_eCos_id+0x14>
10054: e3a01070 mov r1, #112 ; 0x70
10058: e5801000 str r1, [r0]
1005c: e3a00000 mov r0, #0 ; 0x0
10060: e59f1460 ldr r1, [pc, #460] ; 104c8 <_eCos_id+0x18>
10064: e5912004 ldr r2, [r1, #4]
10068: e5802004 str r2, [r0, #4]
1006c: e5912024 ldr r2, [r1, #36]
10070: e5802024 str r2, [r0, #36]
10074: e5912008 ldr r2, [r1, #8]
10078: e5802008 str r2, [r0, #8]
0001007c <start>:
1007c: e59f0440 ldr r0, [pc, #440] ; 104c4 <_eCos_id+0x14>
10080: e3a01050 mov r1, #80 ; 0x50
10084: e5801000 str r1, [r0]
10088: e59f041c ldr r0, [pc, #41c] ; 104ac <.init_flag>
1008c: e5901000 ldr r1, [r0]
10090: e3510000 cmp r1, #0 ; 0x0
10094: 1afffffd bne 10090 <start+0x14>
10098: e59f10ec ldr r1, [pc, #ec] ; 1018c <init_done>
1009c: e5801000 str r1, [r0]
100a0: e3a00000 mov r0, #0 ; 0x0
100a4: e59f13fc ldr r1, [pc, #3fc] ; 104a8 <.__exception_handlers>
100a8: e3570013 cmp r7, #19 ; 0x13
100ac: 0a000001 beq 100b8 <start+0x3c>
100b0: e5912028 ldr r2, [r1, #40]
100b4: e5802028 str r2, [r0, #40]
100b8: e5912018 ldr r2, [r1, #24]
100bc: e5802018 str r2, [r0, #24]
100c0: e5912038 ldr r2, [r1, #56]
100c4: e5802038 str r2, [r0, #56]
100c8: e591201c ldr r2, [r1, #28]
100cc: e580201c str r2, [r0, #28]
100d0: e591203c ldr r2, [r1, #60]
100d4: e580203c str r2, [r0, #60]
100d8: e591200c ldr r2, [r1, #12]
100dc: e580200c str r2, [r0, #12]
100e0: e591202c ldr r2, [r1, #44]
100e4: e580202c str r2, [r0, #44]
100e8: e5912010 ldr r2, [r1, #16]
100ec: e5802010 str r2, [r0, #16]
100f0: e5912030 ldr r2, [r1, #48]
100f4: e5802030 str r2, [r0, #48]
100f8: e59f03c4 ldr r0, [pc, #3c4] ; 104c4 <_eCos_id+0x14>
100fc: e3a01040 mov r1, #64 ; 0x40
10100: e5801000 str r1, [r0]
10104: e59fd36c ldr sp, [pc, #36c] ; 10478 <.__startup_stack>
10108: e3a000d2 mov r0, #210 ; 0xd2
1010c: e129f000 msr CPSR_all, r0
10110: e59fd364 ldr sp, [pc, #364] ; 1047c <.__exception_stack>
10114: e3a000db mov r0, #219 ; 0xdb
10118: e129f000 msr CPSR_all, r0
1011c: e59fd358 ldr sp, [pc, #358] ; 1047c <.__exception_stack>
10120: e3a000d3 mov r0, #211 ; 0xd3
10124: e129f000 msr CPSR_all, r0
10128: e169f000 msr SPSR_all, r0
1012c: e59fd344 ldr sp, [pc, #344] ; 10478 <.__startup_stack>
10130: e59f134c ldr r1, [pc, #34c] ; 10484 <.__bss_start>
10134: e59f234c ldr r2, [pc, #34c] ; 10488 <.__bss_end>
10138: e3a00000 mov r0, #0 ; 0x0
1013c: e1510002 cmp r1, r2
10140: 0a000002 beq 10150 <start+0xd4>
10144: e4810004 str r0, [r1], #4
10148: e1510002 cmp r1, r2
1014c: 1afffffc bne 10144 <start+0xc8>
10150: e59f036c ldr r0, [pc, #36c] ; 104c4 <_eCos_id+0x14>
10154: e3a01030 mov r1, #48 ; 0x30
10158: e5801000 str r1, [r0]
1015c: eb0009f4 bl 12934 <hal_hardware_init>
10160: e59f035c ldr r0, [pc, #35c] ; 104c4 <_eCos_id+0x14>
10164: e3a01020 mov r1, #32 ; 0x20
10168: e5801000 str r1, [r0]
1016c: eb0009b2 bl 1283c <cyg_hal_invoke_constructors>
10170: e59f034c ldr r0, [pc, #34c] ; 104c4 <_eCos_id+0x14>
10174: e3a01010 mov r1, #16 ; 0x10
10178: e5801000 str r1, [r0]
1017c: eb001080 bl 14384 <cyg_start>
00010180 <_start_hang>:
10180: eafffffe b 10180 <_start_hang>
00010184 <reset_platform>:
10184: e3a00000 mov r0, #0 ; 0x0
10188: e1a0f000 mov pc, r0
0001018c <init_done>:
1018c: deadb00b cdple 0, 10, cr11, cr13, cr11, {0}
00010190 <undefined_instruction>:
10190: e59fd2e8 ldr sp, [pc, #2e8] ; 10480 <.__undef_exception_stack>
10194: e92d5801 stmdb sp!, {r0, r11, r12, lr}
10198: e14f0000 mrs r0, SPSR
1019c: e92d0001 stmdb sp!, {r0}
101a0: e1a0c00d mov r12, sp
101a4: e10f0000 mrs r0, CPSR
101a8: e3c0001f bic r0, r0, #31 ; 0x1f
101ac: e3800013 orr r0, r0, #19 ; 0x13
101b0: e129f000 msr CPSR_all, r0
101b4: e1a0b00d mov r11, sp
101b8: e24dd04c sub sp, sp, #76 ; 0x4c
101bc: e88d0fff stmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
101c0: e89c001f ldmia r12, {r0, r1, r2, r3, r4}
101c4: e3100020 tst r0, #32 ; 0x20
101c8: 02444004 subeq r4, r4, #4 ; 0x4
101cc: 12444002 subne r4, r4, #2 ; 0x2
101d0: e58d003c str r0, [sp, #60]
101d4: e58d1000 str r1, [sp]
101d8: e58d202c str r2, [sp, #44]
101dc: e58d3040 str r3, [sp, #64]
101e0: e58d4038 str r4, [sp, #56]
101e4: e58de034 str lr, [sp, #52]
101e8: e28c004c add r0, r12, #76 ; 0x4c
101ec: e58db030 str r11, [sp, #48]
101f0: e3a04001 mov r4, #1 ; 0x1
101f4: ea00003d b 102f0 <call_exception_handler>
000101f8 <software_interrupt>:
101f8: e24dd05c sub sp, sp, #92 ; 0x5c
101fc: e88d0fff stmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
10200: e14f0000 mrs r0, SPSR
10204: e3100020 tst r0, #32 ; 0x20
10208: 024e3004 subeq r3, lr, #4 ; 0x4
1020c: 124e3002 subne r3, lr, #2 ; 0x2
10210: e58d003c str r0, [sp, #60]
10214: e58dc040 str r12, [sp, #64]
10218: e58d3038 str r3, [sp, #56]
1021c: e58de034 str lr, [sp, #52]
10220: e28d005c add r0, sp, #92 ; 0x5c
10224: e58d0030 str r0, [sp, #48]
10228: e3a04002 mov r4, #2 ; 0x2
1022c: ea00002f b 102f0 <call_exception_handler>
00010230 <abort_prefetch>:
10230: e59fd248 ldr sp, [pc, #248] ; 10480 <.__undef_exception_stack>
10234: e24ee004 sub lr, lr, #4 ; 0x4
10238: e92d5801 stmdb sp!, {r0, r11, r12, lr}
1023c: e14f0000 mrs r0, SPSR
10240: e92d0001 stmdb sp!, {r0}
10244: e1a0c00d mov r12, sp
10248: e10f0000 mrs r0, CPSR
1024c: e3c0001f bic r0, r0, #31 ; 0x1f
10250: e3800013 orr r0, r0, #19 ; 0x13
10254: e129f000 msr CPSR_all, r0
10258: e1a0b00d mov r11, sp
1025c: e24dd04c sub sp, sp, #76 ; 0x4c
10260: e88d0fff stmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
10264: e89c001f ldmia r12, {r0, r1, r2, r3, r4}
10268: e58d003c str r0, [sp, #60]
1026c: e58d1000 str r1, [sp]
10270: e58d202c str r2, [sp, #44]
10274: e58d3040 str r3, [sp, #64]
10278: e58d4038 str r4, [sp, #56]
1027c: e58de034 str lr, [sp, #52]
10280: e28c004c add r0, r12, #76 ; 0x4c
10284: e58db030 str r11, [sp, #48]
10288: e3a04003 mov r4, #3 ; 0x3
1028c: ea000017 b 102f0 <call_exception_handler>
00010290 <abort_data>:
10290: e59fd1e8 ldr sp, [pc, #1e8] ; 10480 <.__undef_exception_stack>
10294: e24ee004 sub lr, lr, #4 ; 0x4
10298: e92d5801 stmdb sp!, {r0, r11, r12, lr}
1029c: e14f0000 mrs r0, SPSR
102a0: e92d0001 stmdb sp!, {r0}
102a4: e1a0c00d mov r12, sp
102a8: e10f0000 mrs r0, CPSR
102ac: e3c0001f bic r0, r0, #31 ; 0x1f
102b0: e3800013 orr r0, r0, #19 ; 0x13
102b4: e129f000 msr CPSR_all, r0
102b8: e1a0b00d mov r11, sp
102bc: e24dd04c sub sp, sp, #76 ; 0x4c
102c0: e88d0fff stmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
102c4: e89c001f ldmia r12, {r0, r1, r2, r3, r4}
102c8: e58d003c str r0, [sp, #60]
102cc: e58d1000 str r1, [sp]
102d0: e58d202c str r2, [sp, #44]
102d4: e58d3040 str r3, [sp, #64]
102d8: e58d4038 str r4, [sp, #56]
102dc: e58de034 str lr, [sp, #52]
102e0: e28c004c add r0, r12, #76 ; 0x4c
102e4: e58db030 str r11, [sp, #48]
102e8: e3a04004 mov r4, #4 ; 0x4
102ec: eaffffff b 102f0 <call_exception_handler>
000102f0 <call_exception_handler>:
102f0: e58d4044 str r4, [sp, #68]
102f4: e1a0000d mov r0, sp
102f8: eb00093e bl 127f8 <exception_handler>
102fc: e1a0c00d mov r12, sp
10300: e10f0000 mrs r0, CPSR
10304: e38000c0 orr r0, r0, #192 ; 0xc0
10308: e129f000 msr CPSR_all, r0
1030c: e1a00000 nop (mov r0,r0)
10310: e1a00000 nop (mov r0,r0)
10314: e59ce034 ldr lr, [r12, #52]
10318: e59dd030 ldr sp, [sp, #48]
1031c: e3c0001f bic r0, r0, #31 ; 0x1f
10320: e3800012 orr r0, r0, #18 ; 0x12
10324: e129f000 msr CPSR_all, r0
10328: e1a0d00c mov sp, r12
1032c: e59de038 ldr lr, [sp, #56]
10330: e59d003c ldr r0, [sp, #60]
10334: e59dc040 ldr r12, [sp, #64]
10338: e169f000 msr SPSR_all, r0
1033c: e89d0fff ldmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
10340: e1b0f00e movs pc, lr
00010344 <FIQ>:
10344: e14f8000 mrs r8, SPSR
10348: e208901f and r9, r8, #31 ; 0x1f
1034c: e3590012 cmp r9, #18 ; 0x12
10350: 1a000002 bne 10360 <FIQ+0x1c>
10354: e3888040 orr r8, r8, #64 ; 0x40
10358: e169f008 msr SPSR_all, r8
1035c: e25ef004 subs pc, lr, #4 ; 0x4
10360: e59fd114 ldr sp, [pc, #114] ; 1047c <.__exception_stack>
10364: e90d4100 stmdb sp, {r8, lr}
10368: e3a080d2 mov r8, #210 ; 0xd2
1036c: e129f008 msr CPSR_all, r8
10370: e59fd104 ldr sp, [pc, #104] ; 1047c <.__exception_stack>
10374: e91d6000 ldmdb sp, {sp, lr}
10378: e169f00d msr SPSR_all, sp
0001037c <IRQ>:
1037c: e59fd0f8 ldr sp, [pc, #f8] ; 1047c <.__exception_stack>
10380: e24ee004 sub lr, lr, #4 ; 0x4
10384: e92d5801 stmdb sp!, {r0, r11, r12, lr}
10388: e14f0000 mrs r0, SPSR
1038c: e92d0001 stmdb sp!, {r0}
00010390 <handle_IRQ_or_FIQ>:
10390: e1a0c00d mov r12, sp
10394: e10f0000 mrs r0, CPSR
10398: e3c0001f bic r0, r0, #31 ; 0x1f
1039c: e38000d3 orr r0, r0, #211 ; 0xd3
103a0: e129f000 msr CPSR_all, r0
103a4: e1a0b00d mov r11, sp
103a8: e24dd04c sub sp, sp, #76 ; 0x4c
103ac: e88d0fff stmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
103b0: e89c001f ldmia r12, {r0, r1, r2, r3, r4}
103b4: e58d003c str r0, [sp, #60]
103b8: e58d1000 str r1, [sp]
103bc: e58d202c str r2, [sp, #44]
103c0: e58d3040 str r3, [sp, #64]
103c4: e58d4038 str r4, [sp, #56]
103c8: e58de034 str lr, [sp, #52]
103cc: e58db030 str r11, [sp, #48]
103d0: e3a00006 mov r0, #6 ; 0x6
103d4: e58d0044 str r0, [sp, #68]
103d8: e1a0900d mov r9, sp
103dc: e1a00009 mov r0, r9
103e0: eb000971 bl 129ac <hal_IRQ_handler>
103e4: e1a04000 mov r4, r0
103e8: e1a00004 mov r0, r4
103ec: e3700001 cmn r0, #1 ; 0x1
103f0: 1a000002 bne 10400 <handle_IRQ_or_FIQ+0x70>
103f4: e1a00009 mov r0, r9
103f8: eb00090b bl 1282c <hal_spurious_IRQ>
103fc: ea000006 b 1041c <spurious_IRQ>
10400: e59f1098 ldr r1, [pc, #98] ; 104a0 <.hal_interrupt_data>
10404: e7911104 ldr r1, [r1, r4, lsl #2]
10408: e59f208c ldr r2, [pc, #8c] ; 1049c <.hal_interrupt_handlers>
1040c: e7926104 ldr r6, [r2, r4, lsl #2]
10410: e1a02009 mov r2, r9
10414: e1a0e00f mov lr, pc
10418: e1a0f006 mov pc, r6
0001041c <spurious_IRQ>:
1041c: e1a0c00d mov r12, sp
10420: e10f0000 mrs r0, CPSR
10424: e38000c0 orr r0, r0, #192 ; 0xc0
10428: e129f000 msr CPSR_all, r0
1042c: e1a00000 nop (mov r0,r0)
10430: e1a00000 nop (mov r0,r0)
10434: e59ce034 ldr lr, [r12, #52]
10438: e59dd030 ldr sp, [sp, #48]
1043c: e3c0001f bic r0, r0, #31 ; 0x1f
10440: e3800012 orr r0, r0, #18 ; 0x12
10444: e129f000 msr CPSR_all, r0
10448: e1a0d00c mov sp, r12
1044c: e59de038 ldr lr, [sp, #56]
10450: e59d003c ldr r0, [sp, #60]
10454: e59dc040 ldr r12, [sp, #64]
10458: e169f000 msr SPSR_all, r0
1045c: e89d0fff ldmia sp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11}
10460: e1b0f00e movs pc, lr
00010464 <__gccmain>:
10464: e1a0f00e mov pc, lr
00010468 <_psr>:
10468: e10f0000 mrs r0, CPSR
1046c: e1a0f00e mov pc, lr
00010470 <_sp>:
10470: e1a0000d mov r0, sp
10474: e1a0f00e mov pc, lr
00010478 <.__startup_stack>:
10478: 0001ed00 andeq lr, r1, r0, lsl #26
0001047c <.__exception_stack>:
1047c: 0001e480 andeq lr, r1, r0, lsl #9
00010480 <.__undef_exception_stack>:
10480: 0001e500 andeq lr, r1, r0, lsl #10
00010484 <.__bss_start>:
10484: 0001e3fc streqsh lr, [r1], -r12
00010488 <.__bss_end>:
10488: 00024304 andeq r4, r2, r4, lsl #6
0001048c <._end>:
1048c: 00024304 andeq r4, r2, r4, lsl #6
00010490 <.__rom_data_start>:
10490: 0001dcf8 streqsh sp, [r1], -r8
00010494 <.__ram_data_start>:
10494: 0001dcf8 streqsh sp, [r1], -r8
00010498 <.__ram_data_end>:
10498: 0001e3fc streqsh lr, [r1], -r12
0001049c <.hal_interrupt_handlers>:
1049c: 0001dcfc streqsh sp, [r1], -r12
000104a0 <.hal_interrupt_data>:
104a0: 0001dd50 andeq sp, r1, r0, asr sp
000104a4 <.hal_interrupt_objects>:
104a4: 0001dda4 andeq sp, r1, r4, lsr #27
000104a8 <.__exception_handlers>:
104a8: 00010000 andeq r0, r1, r0
000104ac <.init_flag>:
104ac: 0001dcf8 streqsh sp, [r1], -r8
000104b0 <_eCos_id>:
104b0: 736f4365 cmnvc pc, #-1811939327 ; 0x94000001
104b4: 00203a20 eoreq r3, r0, r0, lsr #20
104b8: 206c754a rsbcs r7, r12, r10, asr #10
104bc: 32203031 eorcc r3, r0, #49 ; 0x31
104c0: 00323030 eoreqs r3, r2, r0, lsr r0
104c4: 07ff5008 ldreqb r5, [pc, r8]!
104c8: 00010000 andeq r0, r1, r0
000104cc <_GLOBAL_.I.49000._home_vinayak_ecos_packages_io_common_current_src_ioinit.cxx2VXuxa>:
}
};
// And here's an instance of the class just to make the code run
static cyg_io_init_class _cyg_io_init CYGBLD_ATTRIB_INIT_PRI(CYG_INIT_IO);
104cc: e1a0c00d mov r12, sp
104d0: e92dd800 stmdb sp!, {r11, r12, lr, pc}
104d4: e24cb004 sub r11, r12, #4 ; 0x4
104d8: e3a01cbf mov r1, #48896 ; 0xbf00
104dc: e2811068 add r1, r1, #104 ; 0x68
104e0: e3a00001 mov r0, #1 ; 0x1
104e4: eb000000 bl 104ec <__static_initialization_and_destruction_0>
104e8: e91ba800 ldmdb r11, {r11, sp, pc}
000104ec <__static_initialization_and_destruction_0>:
// Define table boundaries
CYG_HAL_TABLE_BEGIN( __DEVTAB__, devtab );
CYG_HAL_TABLE_END( __DEVTAB_END__, devtab );
104ec: e1a0c00d mov r12, sp
104f0: e92dd810 stmdb sp!, {r4, r11, r12, lr, pc}
104f4: e24cb004 sub r11, r12, #4 ; 0x4
104f8: e3a03cbf mov r3, #48896 ; 0xbf00
104fc: e2833068 add r3, r3, #104 ; 0x68
10500: e1a04001 mov r4, r1
10504: e1540003 cmp r4, r3
10508: 191ba810 ldmnedb r11, {r4, r11, sp, pc}
1050c: e3500000 cmp r0, #0 ; 0x0
10510: 091ba810 ldmeqdb r11, {r4, r11, sp, pc}
10514: eb002340 bl 1921c <cyg_io_init>
10518: e91ba810 ldmdb r11, {r4, r11, sp, pc}
int hal_IRQ_handler(void)
{
// Do hardware-level IRQ handling
cyg_uint32 irq_status;
HAL_READ_UINT32(E7T_INTOFFSET_IRQ, irq_status);
129ac: e1a0c00d mov r12, sp
129b0: e92dd800 stmdb sp!, {r11, r12, lr, pc}
129b4: e3a03034 mov r3, #52 ; 0x34
129b8: e283367f add r3, r3, #133169152 ; 0x7f00000
129bc: e283393d add r3, r3, #999424 ; 0xf4000
129c0: e5930000 ldr r0, [r3]
129c4: e24cb004 sub r11, r12, #4 ; 0x4
irq_status = irq_status / 4;
129c8: e1a00120 mov r0, r0, lsr #2
if (CYGNUM_HAL_ISR_MAX >= irq_status)
129cc: e3500014 cmp r0, #20 ; 0x14
129d0: 991ba800 ldmlsdb r11, {r11, sp, pc}
return irq_status;
/* vinayak
diag_printf(" ISR is called status : %d \n", irq_status);*/
// It's a bit bogus to test for FIQs after IRQs, but we use the
// latter more, so don't impose the overhead of checking for FIQs
HAL_READ_UINT32(E7T_INTOFFSET_FIQ, irq_status);
129d4: e3a03030 mov r3, #48 ; 0x30
129d8: e283367f add r3, r3, #133169152 ; 0x7f00000
129dc: e283393d add r3, r3, #999424 ; 0xf4000
129e0: e5930000 ldr r0, [r3]
irq_status = irq_status / 4;
129e4: e1a00120 mov r0, r0, lsr #2
if (CYGNUM_HAL_ISR_MAX >= irq_status)
[-- Attachment #3: Type: text/plain, Size: 146 bytes --]
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^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [ECOS] Interrupt Handler
2002-07-10 7:24 [ECOS] Interrupt Handler Vinayak P Risbud
@ 2002-07-10 8:21 ` Robert Cragie
2002-07-10 8:33 ` Vinayak P Risbud
0 siblings, 1 reply; 4+ messages in thread
From: Robert Cragie @ 2002-07-10 8:21 UTC (permalink / raw)
To: Vinayak P Risbud, Ecos-Discuss
An interrupt occurs. It runs the code at 0x10018, which jumps to the
location specified at 0x10038, which is 0x1037c (ignore the disassembly at
0x10038, you are interested in the data here). 0x1037c is the start of the
interrupt handler, which essentially stacks the required registers on the
exception stack and then calls hal_IRQ_handler() at line 0x103e0. You are
now at 0x129ac...
Robert Cragie, Design Engineer
Direct: +44 (0) 114 281 4512
________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
www.jennic.com Tel: +44 (0) 114 281 2655
> -----Original Message-----
> From: ecos-discuss-owner@sources.redhat.com
> [mailto:ecos-discuss-owner@sources.redhat.com]On Behalf Of Vinayak P
> Risbud
> Sent: 10 July 2002 15:23
> To: Ecos-Discuss
> Subject: [ECOS] Interrupt Handler
>
>
> Hi,
> I have attatched my some part of redboot.elf
> disassembled file.
> I am not able to follow, how exactly my ISR is
> called upon reception of an interrupt.
>
> What I know is, upon IRQ, the control jumps to 0x0018.
> I am not able to follow, how exactly, my ISR which is
> present at 0x129ac is called ?
>
> can any one explain me the exact flow ?
>
> Thanks
> Vinayak
>
>
>
--
Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
and search the list archive: http://sources.redhat.com/ml/ecos-discuss
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [ECOS] Interrupt Handler
2002-07-10 8:21 ` Robert Cragie
@ 2002-07-10 8:33 ` Vinayak P Risbud
2002-07-10 10:36 ` Robert Cragie
0 siblings, 1 reply; 4+ messages in thread
From: Vinayak P Risbud @ 2002-07-10 8:33 UTC (permalink / raw)
To: Robert Cragie; +Cc: Ecos-Discuss
Thanks for your response.
Can you explain, me bit clearly, why processor considers
0x1037c as data, and not as instructrion ?
One more problem.
I am working on arm e7t board. I am not able to
communicate with serial ports through interrupts.
My console works fine, but, when I tx some char
on my port the interrupt controller says, the interrupt
is pending and the ARM7 core does not call my interrupt
handler
Can you think of, what exactly could be the problem ?
Thanks
Vinayak
Robert Cragie wrote:
> An interrupt occurs. It runs the code at 0x10018, which jumps to the
> location specified at 0x10038, which is 0x1037c (ignore the disassembly at
> 0x10038, you are interested in the data here). 0x1037c is the start of the
> interrupt handler, which essentially stacks the required registers on the
> exception stack and then calls hal_IRQ_handler() at line 0x103e0. You are
> now at 0x129ac...
>
> Robert Cragie, Design Engineer
>
> Direct: +44 (0) 114 281 4512
> ________________________________________________________
> Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
> www.jennic.com Tel: +44 (0) 114 281 2655
>
> > -----Original Message-----
> > From: ecos-discuss-owner@sources.redhat.com
> > [mailto:ecos-discuss-owner@sources.redhat.com]On Behalf Of Vinayak P
> > Risbud
> > Sent: 10 July 2002 15:23
> > To: Ecos-Discuss
> > Subject: [ECOS] Interrupt Handler
> >
> >
> > Hi,
> > I have attatched my some part of redboot.elf
> > disassembled file.
> > I am not able to follow, how exactly my ISR is
> > called upon reception of an interrupt.
> >
> > What I know is, upon IRQ, the control jumps to 0x0018.
> > I am not able to follow, how exactly, my ISR which is
> > present at 0x129ac is called ?
> >
> > can any one explain me the exact flow ?
> >
> > Thanks
> > Vinayak
> >
> >
> >
>
> --
> Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
> and search the list archive: http://sources.redhat.com/ml/ecos-discuss
--
Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
and search the list archive: http://sources.redhat.com/ml/ecos-discuss
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [ECOS] Interrupt Handler
2002-07-10 8:33 ` Vinayak P Risbud
@ 2002-07-10 10:36 ` Robert Cragie
0 siblings, 0 replies; 4+ messages in thread
From: Robert Cragie @ 2002-07-10 10:36 UTC (permalink / raw)
To: Vinayak P Risbud; +Cc: Ecos-Discuss
The opcode
10018: ldr pc, [pc, #18]
means
"Load the program counter with the address at program counter + 0x18".
This will load the value at 0x10038 (you need to add 8 from the start of the
ldr instruction; see the ARM Reference Manual), which is 0x1037c, into the
program counter. "Loading the program counter" is a synonym for "jump", so
reworded this means:
"Jump to the location specified at address 0x10018 + 0x8 + 0x18 (i.e.
0x10038), which is 0x1037c"
As for not being able to use the serial port, you may need to enable it in
the configuration.
Using the configtool, try checking the box next to "Serial Device
Drivers"/"Hardware Serial Devices Drivers" (i.e. setting
CYGPKG_IO_SERIAL_DEVICES to TRUE) and then maybe checking the box next to
"Serial Device Drivers"/"TTY-mode Serial Devices Drivers"/"TTY-mode Channel
#0" (i.e. setting CYGPKG_IO_SERIAL_TTY_TTY0 to TRUE). This should include
the interrupt driven serial drivers into your configuration. You may need to
recreate the tree and rebuild from scratch to be on the safe side.
Robert Cragie, Design Engineer
Direct: +44 (0) 114 281 4512
________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
www.jennic.com Tel: +44 (0) 114 281 2655
> -----Original Message-----
> From: Vinayak P Risbud [mailto:vinayak@multitech.co.in]
> Sent: 10 July 2002 16:32
> To: Robert Cragie
> Cc: Ecos-Discuss
> Subject: Re: [ECOS] Interrupt Handler
>
>
> Thanks for your response.
>
> Can you explain, me bit clearly, why processor considers
> 0x1037c as data, and not as instructrion ?
> One more problem.
> I am working on arm e7t board. I am not able to
> communicate with serial ports through interrupts.
> My console works fine, but, when I tx some char
> on my port the interrupt controller says, the interrupt
> is pending and the ARM7 core does not call my interrupt
> handler
>
> Can you think of, what exactly could be the problem ?
>
> Thanks
> Vinayak
>
> Robert Cragie wrote:
>
> > An interrupt occurs. It runs the code at 0x10018, which jumps to the
> > location specified at 0x10038, which is 0x1037c (ignore the
> disassembly at
> > 0x10038, you are interested in the data here). 0x1037c is the
> start of the
> > interrupt handler, which essentially stacks the required
> registers on the
> > exception stack and then calls hal_IRQ_handler() at line
> 0x103e0. You are
> > now at 0x129ac...
> >
> > Robert Cragie, Design Engineer
> >
> > Direct: +44 (0) 114 281 4512
> > ________________________________________________________
> > Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
> > www.jennic.com Tel: +44 (0) 114 281 2655
> >
> > > -----Original Message-----
> > > From: ecos-discuss-owner@sources.redhat.com
> > > [mailto:ecos-discuss-owner@sources.redhat.com]On Behalf Of Vinayak P
> > > Risbud
> > > Sent: 10 July 2002 15:23
> > > To: Ecos-Discuss
> > > Subject: [ECOS] Interrupt Handler
> > >
> > >
> > > Hi,
> > > I have attatched my some part of redboot.elf
> > > disassembled file.
> > > I am not able to follow, how exactly my ISR is
> > > called upon reception of an interrupt.
> > >
> > > What I know is, upon IRQ, the control jumps to 0x0018.
> > > I am not able to follow, how exactly, my ISR which is
> > > present at 0x129ac is called ?
> > >
> > > can any one explain me the exact flow ?
> > >
> > > Thanks
> > > Vinayak
> > >
> > >
> > >
> >
> > --
> > Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
> > and search the list archive: http://sources.redhat.com/ml/ecos-discuss
>
>
--
Before posting, please read the FAQ: http://sources.redhat.com/fom/ecos
and search the list archive: http://sources.redhat.com/ml/ecos-discuss
^ permalink raw reply [flat|nested] 4+ messages in thread
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2002-07-10 7:24 [ECOS] Interrupt Handler Vinayak P Risbud
2002-07-10 8:21 ` Robert Cragie
2002-07-10 8:33 ` Vinayak P Risbud
2002-07-10 10:36 ` Robert Cragie
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