* STM32 USART5 rx pin fix
@ 2010-02-05 11:00 Simon Kallweit
0 siblings, 0 replies; only message in thread
From: Simon Kallweit @ 2010-02-05 11:00 UTC (permalink / raw)
To: ecos-patches
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Tiny patch, fixes UART5 RX pin definition.
Simon
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diff --git a/packages/hal/cortexm/stm32/var/current/ChangeLog b/packages/hal/cortexm/stm32/var/current/ChangeLog
index 560cf13..06f5a79 100644
--- a/packages/hal/cortexm/stm32/var/current/ChangeLog
+++ b/packages/hal/cortexm/stm32/var/current/ChangeLog
@@ -1,3 +1,7 @@
+2010-02-05 Simon Kallweit <simon.kallweit@intefo.ch>
+
+ * include/var_io.h: Fixed UART5 RX pin definition.
+
2009-10-26 Ross Younger <wry@ecoscentric.com>
* include/var_io.h: Minor corrections to the FSMC register defs.
diff --git a/packages/hal/cortexm/stm32/var/current/include/var_io.h b/packages/hal/cortexm/stm32/var/current/include/var_io.h
index b998529..fb0827f 100644
--- a/packages/hal/cortexm/stm32/var/current/include/var_io.h
+++ b/packages/hal/cortexm/stm32/var/current/include/var_io.h
@@ -596,7 +596,7 @@ __externC void hal_stm32_gpio_in ( cyg_uint32 pin, int *val );
#define CYGHWR_HAL_STM32_UART4_CTS CYGHWR_HAL_STM32_GPIO_NONE
#define CYGHWR_HAL_STM32_UART4_RTS CYGHWR_HAL_STM32_GPIO_NONE
-#define CYGHWR_HAL_STM32_UART5_RX CYGHWR_HAL_STM32_GPIO( C, 2, IN , FLOATING )
+#define CYGHWR_HAL_STM32_UART5_RX CYGHWR_HAL_STM32_GPIO( D, 2, IN , FLOATING )
#define CYGHWR_HAL_STM32_UART5_TX CYGHWR_HAL_STM32_GPIO( C, 12, OUT_50MHZ , ALT_PUSHPULL )
#define CYGHWR_HAL_STM32_UART5_CTS CYGHWR_HAL_STM32_GPIO_NONE
#define CYGHWR_HAL_STM32_UART5_RTS CYGHWR_HAL_STM32_GPIO_NONE
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