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* [PATCH] backends: add set_initial_registers_tid callback for RISC-V
@ 2018-07-11 10:43 Andreas Schwab
  2018-07-13 12:49 ` Mark Wielaard
  0 siblings, 1 reply; 2+ messages in thread
From: Andreas Schwab @ 2018-07-11 10:43 UTC (permalink / raw)
  To: elfutils-devel

This fixes the backtrace-dwarf and deleted tests, and lets
backtrace-native run a bit further.

Signed-off-by: Andreas Schwab <schwab@suse.de>
---
 backends/ChangeLog       |  6 ++++
 backends/Makefile.am     |  3 +-
 backends/riscv_init.c    |  1 +
 backends/riscv_initreg.c | 77 ++++++++++++++++++++++++++++++++++++++++
 4 files changed, 86 insertions(+), 1 deletion(-)
 create mode 100644 backends/riscv_initreg.c

diff --git a/backends/ChangeLog b/backends/ChangeLog
index 3fa0f198de..0532760046 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,3 +1,9 @@
+2018-07-11  Andreas Schwab  <schwab@suse.de>
+
+	* Makefile.am (riscv_SRCS): Add riscv_initreg.c.
+	* riscv_initreg.c: New file.
+	* riscv_init.c (riscv_init): Hook set_initial_registers_tid.
+
 2018-06-16  Yonghong Song  <yhs@fb.com>
 
 	* Makefile.am (bpf_SRCS): Add bpf_symbol.c.
diff --git a/backends/Makefile.am b/backends/Makefile.am
index e42d67413c..091b078358 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -131,7 +131,8 @@ cpu_bpf = ../libcpu/libcpu_bpf.a
 libebl_bpf_pic_a_SOURCES = $(bpf_SRCS)
 am_libebl_bpf_pic_a_OBJECTS = $(bpf_SRCS:.c=.os)
 
-riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c
+riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c \
+	     riscv_initreg.c
 libebl_riscv_pic_a_SOURCES = $(riscv_SRCS)
 am_libebl_riscv_pic_a_OBJECTS = $(riscv_SRCS:.c=.os)
 
diff --git a/backends/riscv_init.c b/backends/riscv_init.c
index 5588a6b7f0..c74c6af50f 100644
--- a/backends/riscv_init.c
+++ b/backends/riscv_init.c
@@ -57,6 +57,7 @@ riscv_init (Elf *elf __attribute__ ((unused)),
   eh->frame_nregs = 66;
   HOOK (eh, check_special_symbol);
   HOOK (eh, machine_flag_check);
+  HOOK (eh, set_initial_registers_tid);
 
   return MODVERSION;
 }
diff --git a/backends/riscv_initreg.c b/backends/riscv_initreg.c
new file mode 100644
index 0000000000..e31a4dfd02
--- /dev/null
+++ b/backends/riscv_initreg.c
@@ -0,0 +1,77 @@
+/* Fetch live process registers from TID.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include "system.h"
+#include <assert.h>
+#if defined __riscv && defined __linux__
+# include <sys/uio.h>
+# include <sys/procfs.h>
+# include <sys/ptrace.h>
+#endif
+
+#define BACKEND riscv_
+#include "libebl_CPU.h"
+
+bool
+riscv_set_initial_registers_tid (pid_t tid __attribute__ ((unused)),
+				 ebl_tid_registers_t *setfunc __attribute__ ((unused)),
+				 void *arg __attribute__ ((unused)))
+{
+#if !defined __riscv || !defined __linux__
+  return false;
+#else /* __riscv */
+
+  /* General registers.  */
+  elf_gregset_t gregs;
+  struct iovec iovec;
+  iovec.iov_base = &gregs;
+  iovec.iov_len = sizeof (gregs);
+  if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec) != 0)
+    return false;
+
+  /* X0 is constant 0.  */
+  Dwarf_Word zero = 0;
+  if (! setfunc (0, 1, &zero, arg))
+    return false;
+
+  /* X1..X31.  */
+  if (! setfunc (1, 32, (Dwarf_Word *) &gregs[1], arg))
+    return false;
+
+  /* PC.  */
+  if (! setfunc (-1, 1, (Dwarf_Word *) &gregs[0], arg))
+    return false;
+
+  /* FP registers not yet supported.  */
+
+  return true;
+#endif /* __riscv */
+}
-- 
2.18.0


-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] backends: add set_initial_registers_tid callback for RISC-V
  2018-07-11 10:43 [PATCH] backends: add set_initial_registers_tid callback for RISC-V Andreas Schwab
@ 2018-07-13 12:49 ` Mark Wielaard
  0 siblings, 0 replies; 2+ messages in thread
From: Mark Wielaard @ 2018-07-13 12:49 UTC (permalink / raw)
  To: Andreas Schwab, elfutils-devel

On Wed, 2018-07-11 at 12:43 +0200, Andreas Schwab wrote:
> This fixes the backtrace-dwarf and deleted tests, and lets
> backtrace-native run a bit further.

Looks good. Pushed to master.
Funny that there is a dedicated register for the value zero.

Cheers,

Mark

^ permalink raw reply	[flat|nested] 2+ messages in thread

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