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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/100067] Unexpected warning for -mcpu=neoverse-n1 when configured with --with-fpu Date: Mon, 19 Apr 2021 17:00:19 +0000 [thread overview] Message-ID: <bug-100067-4-A1yyOQQhD0@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-100067-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100067 --- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>: https://gcc.gnu.org/g:3bffc4b37e85c7f6092dfb0fbe4067d268e97b46 commit r11-8245-g3bffc4b37e85c7f6092dfb0fbe4067d268e97b46 Author: Richard Earnshaw <rearnsha@arm.com> Date: Mon Apr 19 16:56:31 2021 +0100 arm: partial revert of r11-8168 [PR100067] This is a partial revert of r11-8168. The overall purpose of the commit is retained (to fix a bogus warning when -mfpu=<not-auto> is used in combination with eg -mcpu=neoverse-v1), but it removes the hunk that changed the subsequent feature bits for features of a simd/fp unit that cannot be described by -mfpu. While I still think that is the correct direction of travel, it's somewhat disruptive and not appropriate for late stage4. I'll revisit for gcc-12. gcc: PR target/100067 * config/arm/arm.c (arm_configure_build_target): Do not strip extended FPU/SIMD feature bits from the target ISA when -mfpu is specified (partial revert of r11-8168).
prev parent reply other threads:[~2021-04-19 17:00 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-13 17:40 [Bug target/100067] New: " rearnsha at gcc dot gnu.org 2021-04-14 10:00 ` [Bug target/100067] " cvs-commit at gcc dot gnu.org 2021-04-14 10:07 ` rearnsha at gcc dot gnu.org 2021-04-15 13:29 ` clyon at gcc dot gnu.org 2021-04-15 13:51 ` rearnsha at gcc dot gnu.org 2021-04-15 14:12 ` clyon at gcc dot gnu.org 2021-04-16 11:00 ` cvs-commit at gcc dot gnu.org 2021-04-19 17:00 ` cvs-commit at gcc dot gnu.org [this message]
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