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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/101235] [11/12 Regression] Fails to bootstrap with binutils 2.32
Date: Tue, 29 Jun 2021 05:24:29 +0000 [thread overview]
Message-ID: <bug-101235-4-G5IGFZUrso@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-101235-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101235
--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Kewen Lin <linkw@gcc.gnu.org>:
https://gcc.gnu.org/g:f6306457ee386a9cae9b08e35ce160af0566b9f9
commit r11-8661-gf6306457ee386a9cae9b08e35ce160af0566b9f9
Author: Kewen Lin <linkw@linux.ibm.com>
Date: Tue Jun 22 23:09:30 2021 -0500
rs6000: Fix typos in float128 ISA3.1 support
The recent float128 ISA3.1 support (r12-1340) has some typos,
it makes the libgcc build fail if it's with one binutils
(assembler) which doesn't support Power10 insns. The error
looks like:
Error: invalid switch -mpower10
Error: unrecognized option -mpower10
... [...libgcc/shared-object.mk:14: float128-p10.o] Error 1
What this patch does are:
- fix test target typo libgcc_cv_powerpc_3_1_float128_hw
(written wrongly as libgcc_cv_powerpc_float128_hw, so it's
going to build ISA3.1 stuffs just when detecting ISA3.0).
- fix test used for libgcc_cv_powerpc_3_1_float128_hw check.
- fix test option used for libgcc_cv_powerpc_3_1_float128_hw
check.
- remove the ISA3.1 related contents from t-float128-hw.
- add new macro FLOAT128_HW_INSNS_ISA3_1 to differentiate
ISA3.1 content from ISA3.0 part in ifunc support.
Bootstrapped/regtested on:
- powerpc64le-linux-gnu P10
- powerpc64le-linux-gnu P9 (w/i and w/o p10 supported as)
- powerpc64-linux-gnu P8 (w/i and w/o p10 supported as)
libgcc/ChangeLog:
PR target/101235
* configure: Regenerate.
* configure.ac (test for libgcc_cv_powerpc_3_1_float128_hw): Fix
typos among the name, CFLAGS and the test.
* config/rs6000/t-float128-hw (fp128_3_1_hw_funcs,
fp128_3_1_hw_src,
fp128_3_1_hw_static_obj, fp128_3_1_hw_shared_obj,
fp128_3_1_hw_obj):
Remove.
* config/rs6000/t-float128-p10-hw (FLOAT128_HW_INSNS): Append
macro FLOAT128_HW_INSNS_ISA3_1.
(FP128_3_1_CFLAGS_HW): Fix option typo.
* config/rs6000/float128-ifunc.c (SW_OR_HW_ISA3_1): Guard this with
FLOAT128_HW_INSNS_ISA3_1.
(__floattikf_resolve): Likewise.
(__floatuntikf_resolve): Likewise.
(__fixkfti_resolve): Likewise.
(__fixunskfti_resolve): Likewise.
(__floattikf): Likewise.
(__floatuntikf): Likewise.
(__fixkfti): Likewise.
(__fixunskfti): Likewise.
(cherry picked from commit 47749c43acb460ac8f410ee599616d1860ee5a35)
next prev parent reply other threads:[~2021-06-29 5:24 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-28 6:41 [Bug target/101235] New: " rguenth at gcc dot gnu.org
2021-06-28 6:42 ` [Bug target/101235] [11/12 Regression] " rguenth at gcc dot gnu.org
2021-06-28 6:43 ` linkw at gcc dot gnu.org
2021-06-28 8:22 ` linkw at gcc dot gnu.org
2021-06-28 10:15 ` segher at gcc dot gnu.org
2021-06-29 5:24 ` cvs-commit at gcc dot gnu.org [this message]
2021-06-29 5:30 ` linkw at gcc dot gnu.org
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