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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/101248] [AVX512] The upper bits of FIXUPIMMS{S,D} should come from src1 not dest.
Date: Tue, 29 Jun 2021 02:14:42 +0000 [thread overview]
Message-ID: <bug-101248-4-ru19NtGarx@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-101248-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101248
--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
(In reply to Hongtao.liu from comment #0)
> currently the pattern is defined as
>
> (define_insn "avx512f_sfixupimm<mode>_mask<round_saeonly_name>"
> [(set (match_operand:VF_128 0 "register_operand" "=v")
> (vec_merge:VF_128
> (vec_merge:VF_128
> (unspec:VF_128
> [(match_operand:VF_128 1 "register_operand" "0")
> (match_operand:VF_128 2 "register_operand" "v")
> (match_operand:<sseintvecmode> 3 "<round_saeonly_nimm_scalar_predicate>"
> "<round_saeonly_constraint>")
> (match_operand:SI 4 "const_0_to_255_operand")]
> UNSPEC_FIXUPIMM)
> (match_dup 2)
The is refined pattern, original pattern has match_dup 1 here.
next prev parent reply other threads:[~2021-06-29 2:14 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-29 2:09 [Bug target/101248] New: " crazylht at gmail dot com
2021-06-29 2:12 ` [Bug target/101248] " crazylht at gmail dot com
2021-06-29 2:14 ` crazylht at gmail dot com [this message]
2021-06-30 1:08 ` cvs-commit at gcc dot gnu.org
2021-06-30 1:14 ` crazylht at gmail dot com
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