[Bug target/101471] New: AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[Bug target/101471] New: AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[kastianoza at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

            Bug ID: 101471
           Summary: AVX512 incorrect writemask generated for
                    _mm512_fpclass_ps_mask in O0
           Product: gcc
           Version: 11.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: kastianoza at gmail dot com
  Target Milestone: ---

It seems that in debug mode gcc generates an 8-bit write opmask, which causes
half of the result to be skipped when calling '_mm512_fpclass_ps_mask' (which
takes 16 floats and produces 16 bit result).
It doesn't happen in O1, when gcc generates instruction that doesn't take
writemask.


GCC info:
Using built-in specs.
COLLECT_GCC=g++-11
COLLECT_LTO_WRAPPER=/usr/lib/gcc/x86_64-linux-gnu/11/lto-wrapper
OFFLOAD_TARGET_NAMES=nvptx-none:amdgcn-amdhsa
OFFLOAD_TARGET_DEFAULT=1
Target: x86_64-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Ubuntu
11.1.0-1ubuntu1~18.04.1' --with-bugurl=file:///usr/share/doc/gcc-11/README.Bugs
--enable-languages=c,ada,c++,go,brig,d,fortran,objc,obj-c++,m2 --prefix=/usr
--with-gcc-major-version-only --program-suffix=-11
--program-prefix=x86_64-linux-gnu- --enable-shared --enable-linker-build-id
--libexecdir=/usr/lib --without-included-gettext --enable-threads=posix
--libdir=/usr/lib --enable-nls --enable-clocale=gnu --enable-libstdcxx-debug
--enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new
--enable-gnu-unique-object --disable-vtable-verify --enable-plugin
--enable-default-pie --with-system-zlib --enable-libphobos-checking=release
--with-target-system-zlib=auto --enable-objc-gc=auto --enable-multiarch
--disable-werror --disable-cet --with-arch-32=i686 --with-abi=m64
--with-multilib-list=m32,m64,mx32 --enable-multilib --with-tune=generic
--enable-offload-targets=nvptx-none=/build/gcc-11-YRKbe7/gcc-11-11.1.0/debian/tmp-nvptx/usr,amdgcn-amdhsa=/build/gcc-11-YRKbe7/gcc-11-11.1.0/debian/tmp-gcn/usr
--without-cuda-driver --enable-checking=release --build=x86_64-linux-gnu
--host=x86_64-linux-gnu --target=x86_64-linux-gnu
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 11.1.0 (Ubuntu 11.1.0-1ubuntu1~18.04.1) 


Compilation command:
g++-11 fpclass_instruction.cpp -mavx512f -mavx512vl -mavx512bw -mavx512dq -ggdb
-O0

minimal example:

#include <immintrin.h>
#include <iostream>

int main() {
  __m512 x {
      1, 1, 1, 1,
      1, 1, 1, 1,
      0, 0, 0, 0,
      0, 0, 0, 0,  };
  auto ret = _mm512_fpclass_ps_mask(x, 0x26);
  std::cout << ret << std::endl;
}


relevant part of preprocessed code: (notice incorrect mask type : __mmask8)
# 7 "fpclass_instruction.cpp"
int main() {
  __m512 x {
      1, 1, 1, 1,
      1, 1, 1, 1,
      0, 0, 0, 0,
      0, 0, 0, 0, };
  auto ret = 
# 13 "fpclass_instruction.cpp" 3 4
            ((__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) (__m512) (
# 13 "fpclass_instruction.cpp"
            x
# 13 "fpclass_instruction.cpp" 3 4
            ), (int) (
# 13 "fpclass_instruction.cpp"
            0x26
# 13 "fpclass_instruction.cpp" 3 4
            ),(__mmask8)-1))
# 13 "fpclass_instruction.cpp"
                                           ;
  std::cout << ret << std::endl;
}

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[kastianoza at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #1 from Kastax <kastianoza at gmail dot com> ---
Attachment size limit is too strict for me to include "the preprocessed file
(*.i*) that triggers the bug"

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

Hongtao.liu <crazylht at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |wwwhhhyyy333 at gmail dot com

--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
w/ -O0, it's defined as macro

#define _mm512_fpclass_ps_mask(x, c)                                    \
  ((__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) (__m512) (x),\
                                                 (int) (c),(__mmask8)-1))

and (__mmask16)-1 should be used

w/ -O2 it's ok

extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_fpclass_ps_mask (__m512 __A, const int __imm)
{
  return (__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) __A,
                                                       __imm,
                                                       (__mmask16) -1);
}

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #3 from Hongtao.liu <crazylht at gmail dot com> ---
We need to fixed for -O0 in header file.

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:db3d4129b6f4cff685713da514b64ff7bbc401fc

commit r12-3135-gdb3d4129b6f4cff685713da514b64ff7bbc401fc
Author: konglin1 <lingling.kong@intel.com>
Date:   Mon Aug 9 10:58:24 2021 +0800

    i386: Fix _mm512_fpclass_ps_mask in O0 [PR 101471]

    gcc/ChangeLog:

            PR target/101471
            * config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
            macro define in O0.
            (_mm512_mask_fpclass_ps_mask): Ditto.

    gcc/testsuite/ChangeLog:

            PR target/101471
            * gcc.target/i386/avx512f-pr101471.c: New test.

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by hongtao Liu
<liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:6604b336517463f9189e1c95db405a154aa7c815

commit r11-8924-g6604b336517463f9189e1c95db405a154aa7c815
Author: konglin1 <lingling.kong@intel.com>
Date:   Mon Aug 9 10:58:24 2021 +0800

    i386: Fix _mm512_fpclass_ps_mask in O0 [PR 101471]

    gcc/ChangeLog:

            PR target/101471
            * config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
            macro define in O0.
            (_mm512_mask_fpclass_ps_mask): Ditto.

    gcc/testsuite/ChangeLog:

            PR target/101471
            * gcc.target/i386/avx512f-pr101471.c: New test.

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by hongtao Liu
<liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:280b69a94f49ad449159f3be6597173c67b11176

commit r10-10069-g280b69a94f49ad449159f3be6597173c67b11176
Author: konglin1 <lingling.kong@intel.com>
Date:   Mon Aug 9 10:58:24 2021 +0800

    i386: Fix _mm512_fpclass_ps_mask in O0 [PR 101471]

    gcc/ChangeLog:

            PR target/101471
            * config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
            macro define in O0.
            (_mm512_mask_fpclass_ps_mask): Ditto.

    gcc/testsuite/ChangeLog:

            PR target/101471
            * gcc.target/i386/avx512f-pr101471.c: New test.

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by hongtao Liu
<liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:357246c04dc869aec2f099e8c73f9a2bd5f030ca

commit r9-9694-g357246c04dc869aec2f099e8c73f9a2bd5f030ca
Author: konglin1 <lingling.kong@intel.com>
Date:   Mon Aug 9 10:58:24 2021 +0800

    i386: Fix _mm512_fpclass_ps_mask in O0 [PR 101471]

    gcc/ChangeLog:

            PR target/101471
            * config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
            macro define in O0.
            (_mm512_mask_fpclass_ps_mask): Ditto.

    gcc/testsuite/ChangeLog:

            PR target/101471
            * gcc.target/i386/avx512f-pr101471.c: New test.

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

--- Comment #8 from Hongtao.liu <crazylht at gmail dot com> ---
Fixed in GCC12, backport to GCC9, GCC10 and GCC11.

[Bug target/101471] AVX512 incorrect writemask generated for _mm512_fpclass_ps_mask in O0

[liuhongt at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101471

liuhongt at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED
                 CC|                            |liuhongt at gcc dot gnu.org

--- Comment #9 from liuhongt at gcc dot gnu.org ---
Fixed.