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From: "gabravier at gmail dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/102391] Failure to optimize adjacent 8-bit loads into a single bigger load Date: Sat, 18 Sep 2021 00:03:04 +0000 [thread overview] Message-ID: <bug-102391-4-CnjGhcUJ1s@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-102391-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102391 Gabriel Ravier <gabravier at gmail dot com> changed: What |Removed |Added ---------------------------------------------------------------------------- Summary|Failure to optimize 2 8-bit |Failure to optimize |loads into a single 16-bit |adjacent 8-bit loads into a |load |single bigger load --- Comment #1 from Gabriel Ravier <gabravier at gmail dot com> --- Note: this also equivalently works on bigger sizes: uint32_t HeaderReadU32LE(int offset, uint8_t *RomHeader) { return RomHeader[offset] | (RomHeader[offset + 1] << 8) | (RomHeader[offset + 2] << 16) | (RomHeader[offset + 3] << 24); } On AMD64, GCC outputs this: HeaderReadU32LE: movsx rdi, edi movzx eax, BYTE PTR [rsi+1+rdi] movzx edx, BYTE PTR [rsi+2+rdi] sal eax, 8 sal edx, 16 or eax, edx movzx edx, BYTE PTR [rsi+rdi] or eax, edx movzx edx, BYTE PTR [rsi+3+rdi] sal edx, 24 or eax, edx ret LLVM manages this: HeaderReadU32LE: movsxd rax, edi mov eax, dword ptr [rsi + rax] ret
next prev parent reply other threads:[~2021-09-18 0:03 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-17 22:32 [Bug tree-optimization/102391] New: Failure to optimize 2 8-bit loads into a single 16-bit load gabravier at gmail dot com 2021-09-18 0:03 ` gabravier at gmail dot com [this message] 2021-09-18 0:14 ` [Bug tree-optimization/102391] Failure to optimize adjacent 8-bit loads into a single bigger load pinskia at gcc dot gnu.org 2021-09-20 8:42 ` rguenth at gcc dot gnu.org 2021-12-15 23:31 ` pinskia at gcc dot gnu.org
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