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* [Bug target/102522] New: Multiplication by scalar on arm-v7 seems to generate scalar code
@ 2021-09-28 19:25 denis.yaroshevskij at gmail dot com
2021-09-28 19:38 ` [Bug target/102522] " pinskia at gcc dot gnu.org
2021-09-30 7:06 ` denis.yaroshevskij at gmail dot com
0 siblings, 2 replies; 3+ messages in thread
From: denis.yaroshevskij at gmail dot com @ 2021-09-28 19:25 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102522
Bug ID: 102522
Summary: Multiplication by scalar on arm-v7 seems to generate
scalar code
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: denis.yaroshevskij at gmail dot com
Target Milestone: ---
ARM-V7 Neon has intrinsics like vmulq_n_u32 that are suppose to generate one
mul instruction.
However it seems that gcc decomposes it into scalar:
```
vmov.i32 d7, #0 @ v2si
vmov.32 d7[0], r0
vmul.i32 q0, q0, d7[0]
bx lr
```
https://godbolt.org/z/zv8o1KKW1
Is this an expected behaviour?
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/102522] Multiplication by scalar on arm-v7 seems to generate scalar code
2021-09-28 19:25 [Bug target/102522] New: Multiplication by scalar on arm-v7 seems to generate scalar code denis.yaroshevskij at gmail dot com
@ 2021-09-28 19:38 ` pinskia at gcc dot gnu.org
2021-09-30 7:06 ` denis.yaroshevskij at gmail dot com
1 sibling, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2021-09-28 19:38 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102522
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |INVALID
Status|UNCONFIRMED |RESOLVED
--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Denis Yaroshevskiy from comment #0)
> ARM-V7 Neon has intrinsics like vmulq_n_u32 that are suppose to generate one
> mul instruction.
Read the outputed code again.
you need to move the argument x which is currently in r0 into a SIMD register.
GCC zeros out the other parts of the register just because.
And then it does the multiple.
vmov.i32 d7, #0 @ v2si // d7 = {0,0}
vmov.32 d7[0], r0 // d7 = {x, 0}
vmul.i32 q0, q0, d7[0] // q0 *= d7[0] (or rather q0 *= x)
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Bug target/102522] Multiplication by scalar on arm-v7 seems to generate scalar code
2021-09-28 19:25 [Bug target/102522] New: Multiplication by scalar on arm-v7 seems to generate scalar code denis.yaroshevskij at gmail dot com
2021-09-28 19:38 ` [Bug target/102522] " pinskia at gcc dot gnu.org
@ 2021-09-30 7:06 ` denis.yaroshevskij at gmail dot com
1 sibling, 0 replies; 3+ messages in thread
From: denis.yaroshevskij at gmail dot com @ 2021-09-30 7:06 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102522
--- Comment #2 from Denis Yaroshevskiy <denis.yaroshevskij at gmail dot com> ---
You are right, it works.
Tried in a loop, I get:
vmul.i32 q8, q8, d9[0]
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2021-09-30 7:06 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2021-09-28 19:25 [Bug target/102522] New: Multiplication by scalar on arm-v7 seems to generate scalar code denis.yaroshevskij at gmail dot com
2021-09-28 19:38 ` [Bug target/102522] " pinskia at gcc dot gnu.org
2021-09-30 7:06 ` denis.yaroshevskij at gmail dot com
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