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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/102543] -march=cascadelake performs odd alignment peeling
Date: Wed, 06 Oct 2021 15:00:57 +0000	[thread overview]
Message-ID: <bug-102543-4-3fQnqNKKkL@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-102543-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102543

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
Caused by

commit 001e73373e6d2e7c756141e0d7ac8e24ae1574ad
Author: Sergey Shalnov <Sergey.Shalnov@intel.com>
Date:   Thu Feb 8 23:31:15 2018 +0100

    re PR target/83008 ([performance] Is it better to avoid extra instructions
in data passing between loops?)

            PR target/83008
            * config/i386/x86-tune-costs.h (skylake_cost): Fix cost of
            storing integer register in SImode.  Fix cost of 256 and 512
            byte aligned SSE register store.

            * config/i386/i386.c (ix86_multiplication_cost): Fix
            multiplication cost for TARGET_AVX512DQ.

  parent reply	other threads:[~2021-10-06 15:00 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30 10:13 [Bug target/102543] New: " rguenth at gcc dot gnu.org
2021-09-30 10:14 ` [Bug target/102543] " rguenth at gcc dot gnu.org
2021-10-06 15:00 ` rguenth at gcc dot gnu.org [this message]
2021-10-08  9:04 ` crazylht at gmail dot com
2021-10-08  9:49 ` crazylht at gmail dot com
2021-10-08 10:07 ` rguenther at suse dot de
2021-10-08 10:43 ` rguenth at gcc dot gnu.org
2021-10-11  2:19 ` crazylht at gmail dot com
2021-10-12 12:53 ` rguenth at gcc dot gnu.org
2021-10-13  1:20 ` crazylht at gmail dot com
2021-10-13  7:25 ` rguenther at suse dot de
2021-11-19  1:23 ` cvs-commit at gcc dot gnu.org
2023-11-30  8:53 ` liuhongt at gcc dot gnu.org

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