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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/102543] New: -march=cascadelake performs odd alignment peeling
Date: Thu, 30 Sep 2021 10:13:23 +0000 [thread overview]
Message-ID: <bug-102543-4@http.gcc.gnu.org/bugzilla/> (raw)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102543
Bug ID: 102543
Summary: -march=cascadelake performs odd alignment peeling
Product: gcc
Version: 12.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: rguenth at gcc dot gnu.org
Target Milestone: ---
For gcc.dg/torture/pr65270-1.c we choose to misalign an aligned store + load
combo for runtime aligning a single load because we have (skylake_cost):
{6, 6, 6, 10, 20}, /* cost of loading SSE register
in 32bit, 64bit, 128bit, 256bit and
512bit */
{8, 8, 8, 12, 24}, /* cost of storing SSE register
in 32bit, 64bit, 128bit, 256bit and
512bit */
{6, 6, 6, 10, 20}, /* cost of unaligned loads. */
{8, 8, 8, 8, 16}, /* cost of unaligned stores. */
which means that an unaligned store is cheaper than an aligned store for
%ymm and even more so for %zmm!??
next reply other threads:[~2021-09-30 10:13 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-30 10:13 rguenth at gcc dot gnu.org [this message]
2021-09-30 10:14 ` [Bug target/102543] " rguenth at gcc dot gnu.org
2021-10-06 15:00 ` rguenth at gcc dot gnu.org
2021-10-08 9:04 ` crazylht at gmail dot com
2021-10-08 9:49 ` crazylht at gmail dot com
2021-10-08 10:07 ` rguenther at suse dot de
2021-10-08 10:43 ` rguenth at gcc dot gnu.org
2021-10-11 2:19 ` crazylht at gmail dot com
2021-10-12 12:53 ` rguenth at gcc dot gnu.org
2021-10-13 1:20 ` crazylht at gmail dot com
2021-10-13 7:25 ` rguenther at suse dot de
2021-11-19 1:23 ` cvs-commit at gcc dot gnu.org
2023-11-30 8:53 ` liuhongt at gcc dot gnu.org
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