[Bug target/102758] New: [x86] Failure to use registers optimally when swapping between (identically represented) vector types

[Bug target/102758] New: [x86] Failure to use registers optimally when swapping between (identically represented) vector types

[gabravier at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

            Bug ID: 102758
           Summary: [x86] Failure to use registers optimally when swapping
                    between (identically represented) vector types
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gabravier at gmail dot com
  Target Milestone: ---

#include <stdint.h>

typedef int64_t v2i64 __attribute__((vector_size(16)));
typedef uint16_t v8u16 __attribute__((vector_size(16)));

v2i64 f(v8u16 make_b_xxm1, v2i64 b)
{
    return (v2i64)((v8u16)b + (v8u16){1});
}

With -O3, GCC outputs this:

f(unsigned short __vector(8), long __vector(2)):
        movdqa  xmm2, XMMWORD PTR .LC0[rip]
        paddw   xmm2, xmm1
        movdqa  xmm0, xmm2
        ret

LLVM outputs this:

f(unsigned short __vector(8), long __vector(2)):
        movdqa  xmm0, xmm1
        paddw   xmm0, xmmword ptr [rip + .LCPI0_0]
        ret

It should be possible to optimize out the last `movdqa`. This seems to be
directly related to the usage of differing types here (even though the
conversion is cost-free) as replacing all usage of `v2i64` with `v8u16` makes
this be better optimized.

[Bug target/102758] [12 Regression] Failure to use registers optimally with return values (2 operands related)

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-10-15
             Status|UNCONFIRMED                 |NEW
      Known to work|                            |11.2.0
   Target Milestone|---                         |12.0
            Summary|[x86] Failure to use        |[12 Regression] Failure to
                   |registers optimally when    |use registers optimally
                   |swapping between            |with return values (2
                   |(identically represented)   |operands related)
                   |vector types                |
      Known to fail|                            |12.0

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
GCC 11.2.0 (and before) produces:
        movdqa  .LC0(%rip), %xmm0
        paddw   %xmm1, %xmm0
        ret

Which is what you want.
I don't know why trunk changed ...

[Bug target/102758] [12 Regression] Failure to use registers optimally with return values (2 operands related and subreg)

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |minor
           Keywords|needs-bisection             |
            Summary|[12 Regression] Failure to  |[12 Regression] Failure to
                   |use registers optimally     |use registers optimally
                   |with return values (2       |with return values (2
                   |operands related)           |operands related and
                   |                            |subreg)

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So the difference in the IR happens from forwprop.
before RA we have this for the old compiler:
(insn 9 8 14 2 (set (reg:V8HI 89)
        (plus:V8HI (reg:V8HI 90)
            (subreg:V8HI (reg:V2DI 91) 0))) "/app/example.cpp":8:29 3418
{*addv8hi3}
     (expr_list:REG_DEAD (reg:V2DI 91)
        (expr_list:REG_DEAD (reg:V8HI 90)
            (nil))))
(insn 14 9 15 2 (set (reg/i:V2DI 20 xmm0)
        (subreg:V2DI (reg:V8HI 89) 0)) "/app/example.cpp":9:1 1439
{movv2di_internal}
     (expr_list:REG_DEAD (reg:V8HI 89)
        (nil)))

With the new compile we have:
(insn 10 9 14 2 (set (subreg:V8HI (reg:V2DI 84 [ <retval> ]) 0)
        (plus:V8HI (reg:V8HI 90)
            (subreg:V8HI (reg:V2DI 91) 0))) "/app/example.cpp":8:41 5787
{*addv8hi3}
     (expr_list:REG_DEAD (reg:V8HI 90)
        (expr_list:REG_DEAD (reg:V2DI 91)
            (nil))))
(insn 14 10 15 2 (set (reg/i:V2DI 20 xmm0)
        (reg:V2DI 84 [ <retval> ])) "/app/example.cpp":9:1 1634
{movv2di_internal}
     (expr_list:REG_DEAD (reg:V2DI 84 [ <retval> ])
        (nil)))

This now confuses the register allocator.

So this is only an issue with return because of the hard register being
involved. So this is a minor issue and not much of a problem unless you are
doing microbenchmarking.

[Bug target/102758] [12 Regression] Failure to use registers optimally with return values (2 operands related and subreg)

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rsandifo at gcc dot gnu.org

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
Richard?  How does the new fwprop behave wrt hardregs?

[Bug target/102758] [12 Regression] Failure to use registers optimally with return values (2 operands related and subreg)

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

--- Comment #4 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #3)
> Richard?  How does the new fwprop behave wrt hardregs?
It doesn't sound like this is new vs. old fwprop, since new fwprop
was in GCC 11.  Generally the idea was to follow the existing
behaviour as closely as possible, so I don't know of any specific
differences re: hard regs.

[Bug target/102758] [12/13 Regression] Failure to use registers optimally with return values (2 operands related and subreg)

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|12.0                        |12.2

--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 12.1 is being released, retargeting bugs to GCC 12.2.

[Bug target/102758] [12/13 Regression] Failure to use registers optimally with return values (2 operands related and subreg)

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |needs-bisection
           Priority|P3                          |P2

[Bug target/102758] [12/13/14 Regression] Failure to use registers optimally with return values (2 operands related and subreg)

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102758

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|12.3                        |12.4

--- Comment #7 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 12.3 is being released, retargeting bugs to GCC 12.4.