public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
From: "jason at zx2c4 dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/103252] questionable codegen with kmovd
Date: Tue, 16 Nov 2021 12:06:23 +0000 [thread overview]
Message-ID: <bug-103252-4-bongd8MYqQ@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-103252-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103252
--- Comment #9 from Jason A. Donenfeld <jason at zx2c4 dot com> ---
> When the mask registers are available for use, RA considers them and when spilling to those is cheaper than to memory, it spills to them and not memory.
Yes, this is the thing I don't get. When you compare the codegen for avx512 vs
non-avx512, the non-avx512 doesn't spill at all there. So this isn't "spill to
memory" vs "spill to mask register". This is "don't spill" vs "spill to mask
register". And the latter seems clearly worse.
-------------
(As an aside, Agner reports a certain "fast forwarding" on Tigerlake+, with
zero latency write-to-read for certain addresses, with stack computations being
easy ones. Looking at 'MOV r32,[m32]+MOV [m32],r32' here:
http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00506E3_Skylake2_InstLatX64.txt
http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00606A6_ICX_InstLatX64.txt
http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00806C1_TigerLake3_InstLatX64.txt
http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel0090672_AlderLake_BC_AVX512_InstLatX64.txt
you can see the huge reduction on Tigerlake and Alderlake. This is totally
irrelevant and immaterial for the purposes of this bug report, but I idly
wonder if at some point there'll be a slightly different cost model for this
between Icelake and Tigerlake+.)
next prev parent reply other threads:[~2021-11-16 12:06 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-15 14:58 [Bug c/103252] New: " jason at zx2c4 dot com
2021-11-15 15:18 ` [Bug c/103252] " jason at zx2c4 dot com
2021-11-15 17:10 ` jason at zx2c4 dot com
2021-11-15 17:52 ` [Bug target/103252] " jakub at gcc dot gnu.org
2021-11-15 17:59 ` pinskia at gcc dot gnu.org
2021-11-15 18:07 ` jason at zx2c4 dot com
2021-11-16 1:20 ` crazylht at gmail dot com
2021-11-16 9:29 ` rguenth at gcc dot gnu.org
2021-11-16 11:51 ` jason at zx2c4 dot com
2021-11-16 11:56 ` jakub at gcc dot gnu.org
2021-11-16 12:06 ` jason at zx2c4 dot com [this message]
2021-11-18 7:09 ` crazylht at gmail dot com
2021-11-18 8:26 ` crazylht at gmail dot com
2021-11-19 2:42 ` crazylht at gmail dot com
2021-11-19 6:27 ` crazylht at gmail dot com
2021-11-24 5:47 ` crazylht at gmail dot com
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bug-103252-4-bongd8MYqQ@http.gcc.gnu.org/bugzilla/ \
--to=gcc-bugzilla@gcc.gnu.org \
--cc=gcc-bugs@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).