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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/103861] [i386] vectorize v2qi vectors Date: Sun, 02 Jan 2022 20:13:27 +0000 [thread overview] Message-ID: <bug-103861-4-vdQcAk43zb@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-103861-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103861 --- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>: https://gcc.gnu.org/g:9ff206d3865df5cb8407490aa9481029beac087f commit r12-6173-g9ff206d3865df5cb8407490aa9481029beac087f Author: Uros Bizjak <ubizjak@gmail.com> Date: Sun Jan 2 21:12:10 2022 +0100 i386: Introduce V2QImode vectorized arithmetic [PR103861] This patch adds basic V2QImode infrastructure and V2QImode arithmetic operations (plus, minus and neg). The patched compiler can emit SSE vectorized QImode operations (e.g. PADDB) with partial QImode vector, and also synthesized double HI/LO QImode operations with integer registers. The testcase: typedef char __v2qi __attribute__ ((__vector_size__ (2))); __v2qi plus (__v2qi a, __v2qi b) { return a + b; }; compiles with -O2 to: movl %edi, %edx movl %esi, %eax addb %sil, %dl addb %ah, %dh movl %edx, %eax ret which is much better than what the unpatched compiler produces: movl %edi, %eax movl %esi, %edx xorl %ecx, %ecx movb %dil, %cl movsbl %dh, %edx movsbl %ah, %eax addl %edx, %eax addb %sil, %cl movb %al, %ch movl %ecx, %eax ret The V2QImode vectorization does not require vector registers, so it can be enabled by default also for 32-bit targets without SSE. The patch also enables vectorized V2QImode sign/zero extends. 2021-12-30 Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog: PR target/103861 * config/i386/i386.h (VALID_SSE2_REG_MODE): Add V2QImode. (VALID_INT_MODE_P): Ditto. * config/i386/i386.c (ix86_secondary_reload): Handle V2QImode reloads from SSE register to memory. (vector_mode_supported_p): Always return true for V2QImode. * config/i386/i386.md (*subqi_ext<mode>_2): New insn pattern. (*negqi_ext<mode>_2): Ditto. * config/i386/mmx.md (movv2qi): New expander. (movmisalignv2qi): Ditto. (*movv2qi_internal): New insn pattern. (*pushv2qi2): Ditto. (negv2qi2 and splitters): Ditto. (<plusminus:insn>v2qi3 and splitters): Ditto. gcc/testsuite/ChangeLog: PR target/103861 * gcc.dg/store_merging_18.c (dg-options): Add -fno-tree-vectorize. * gcc.dg/store_merging_29.c (dg-options): Ditto. * gcc.target/i386/pr103861.c: New test. * gcc.target/i386/pr92658-avx512vl.c (dg-final): Remove vpmovqb scan-assembler xfail. * gcc.target/i386/pr92658-sse4.c (dg-final): Remove pmovzxbq scan-assembler xfail. * gcc.target/i386/pr92658-sse4-2.c (dg-final): Remove pmovsxbq scan-assembler xfail. * gcc.target/i386/warn-vect-op-2.c (dg-warning): Adjust warnings.
next prev parent reply other threads:[~2022-01-02 20:13 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-29 18:09 [Bug target/103861] New: " ubizjak at gmail dot com 2021-12-29 18:13 ` [Bug target/103861] " ubizjak at gmail dot com 2021-12-29 18:15 ` ubizjak at gmail dot com 2021-12-29 18:21 ` ubizjak at gmail dot com 2021-12-29 20:36 ` pinskia at gcc dot gnu.org 2022-01-02 20:13 ` cvs-commit at gcc dot gnu.org [this message] 2022-01-04 13:59 ` rguenth at gcc dot gnu.org 2022-01-04 14:14 ` ubizjak at gmail dot com 2022-01-04 18:44 ` cvs-commit at gcc dot gnu.org 2022-01-05 22:17 ` cvs-commit at gcc dot gnu.org 2022-01-10 20:00 ` cvs-commit at gcc dot gnu.org 2022-01-11 18:24 ` cvs-commit at gcc dot gnu.org 2022-01-12 19:03 ` cvs-commit at gcc dot gnu.org 2022-01-13 19:49 ` cvs-commit at gcc dot gnu.org 2023-10-27 3:28 ` cvs-commit at gcc dot gnu.org
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