[Bug c++/104145] New: Extra instructions generated for dual float return on ARM64.

[Bug c++/104145] New: Extra instructions generated for dual float return on ARM64.

[asd0025 at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104145

            Bug ID: 104145
           Summary: Extra instructions generated for dual float return on
                    ARM64.
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: asd0025 at gmail dot com
  Target Milestone: ---

In the following code snippet, inefficient code is generated when returning 2
floats on ARM64/AArch64: https://godbolt.org/z/3G8nMT8W4

```
typedef float f32;
typedef double f64;

template <class A, class B = A>
struct duo
{
    A a;
    B b;
};

duo<f32> stream_load2(const f32* p)
{
    f32 a, b;
    asm("ldnp %s0, %s1, %2" : "=w"(a), "=w"(b) : "m"(*(const f32(*)[2])p));
    return {a, b}; // NOTE: many extra instuctions are generated!
}

duo<f32> stream_load2_ldp(const f32* p)
{
    return {p[0], p[1]}; // NOTE: inefficient code is generated for this!
}

duo<f64> stream_load2(const f64* p)
{
    f64 a, b;
    asm("ldnp %d0, %d1, %2" : "=w"(a), "=w"(b) : "m"(*(const f64(*)[2])p));
    return {a, b}; // NOTE: works as expected!
}
```

GCC output (v6.4+):
```
stream_load2(float const*):
        ldnp s1, s0, [x0]
        fmov    w2, s1
        fmov    w0, s0
        mov     x1, 0
        bfi     x1, x2, 0, 32
        bfi     x1, x0, 32, 32
        lsr     x0, x1, 32
        lsr     w1, w1, 0
        fmov    s1, w0
        fmov    s0, w1
        ret

stream_load2_ldp(float const*):
        ldr     d0, [x0]
        fmov    x1, d0
        lsr     x0, x1, 32
        fmov    s1, w0
        lsr     w0, w1, 0
        fmov    s0, w0
        ret

stream_load2(double const*):
        ldnp d0, d1, [x0]
        ret
```

Clang output:
```
stream_load2(float const*):
        ldnp    s0, s1, [x0]
        ret

stream_load2_ldp(float const*):
        ldp     s0, s1, [x0]
        ret

stream_load2(double const*):
        ldnp    d0, d1, [x0]
        ret
```

[Bug middle-end/104145] Extra instructions generated for dual float return on ARM64.

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104145

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
There might be a dup of this bug already.

[Bug middle-end/104145] Extra instructions generated for dual float return on ARM64.

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104145

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

[Bug middle-end/104145] Extra instructions generated for dual float return on ARM64.

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104145

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2022-01-21
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed, there are definitely others like this.