[Bug c/104445] New: [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[Bug c/104445] New: [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[gscfq@t-online.de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

            Bug ID: 104445
           Summary: [12 Regression] ICE in vect_create_partial_epilog, at
                    tree-vect-loop.cc:5098
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gscfq@t-online.de
  Target Milestone: ---

Changed between 20210711 and 20210718, at -O3 or -Ofast :


$ cat z1.c
signed char a;
signed char f (int i, int j)
{
  signed char c;
  while (i != 0)
  {
    a ^= j;
    ++c;
    ++i;
  }
  return c;
}


$ gcc-12-20220206 -c z1.c -m32 -O3 -mavx -mno-mmx
during GIMPLE pass: vect
z1.c: In function 'f':
z1.c:2:13: internal compiler error: in vect_create_partial_epilog, at
tree-vect-loop.cc:5098
    2 | signed char f (int i, int j)
      |             ^
0xe32e69 vect_create_partial_epilog
        ../../gcc/tree-vect-loop.cc:5095
0xe3bd5f vect_transform_cycle_phi(_loop_vec_info*, _stmt_vec_info*, gimple**,
_slp_tree*, _slp_instance*)
        ../../gcc/tree-vect-loop.cc:7795
0x190fcad vect_transform_stmt(vec_info*, _stmt_vec_info*,
gimple_stmt_iterator*, _slp_tree*, _slp_instance*)
        ../../gcc/tree-vect-stmts.cc:11276
0xe4b65f vect_transform_loop(_loop_vec_info*, gimple*)
        ../../gcc/tree-vect-loop.cc:9799
0xe7d565 vect_transform_loops
        ../../gcc/tree-vectorizer.cc:1004
0xe7d713 vect_transform_loops
        ../../gcc/tree-vectorizer.cc:1022
0xe7db86 try_vectorize_loop_1
        ../../gcc/tree-vectorizer.cc:1133
0xe7db86 try_vectorize_loop
        ../../gcc/tree-vectorizer.cc:1164
0xe7e0c4 execute
        ../../gcc/tree-vectorizer.cc:1278

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|c                           |tree-optimization
   Target Milestone|---                         |12.0

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2022-02-09
           Keywords|                            |needs-bisection

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rguenth at gcc dot gnu.org

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Most likely caused by r12-2292-g1dd3f21095858fbfd3 .

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
           Priority|P3                          |P1
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
Meh.  Mine.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |uros at gcc dot gnu.org

--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
So we end up with the desire to do a V32QI -> V4QI reduction.  I already knew
of the "hole" not checking for the extract operation availability, so I'm going
to plug that now.  In this case we are missing V4QImode from V8QImode
extraction
via vec_extract_optab, likewise the corresponding SImode from V4SImode
extraction (though V4SImode is available and V8QImode had supported add ...).

I'll plug the hole in the vectorizer but maybe we can also add vec_extract
patterns here.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
We do have:

(define_expand "vec_extractv4qiqi"
  [(match_operand:QI 0 "register_operand")
   (match_operand:V4QI 1 "register_operand")
   (match_operand 2 "const_int_operand")]
  "TARGET_SSE4_1"
{
  ix86_expand_vector_extract (false, operands[0],
                              operands[1], INTVAL (operands[2]));
  DONE;
})

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #5)
> We do have:
> 
> (define_expand "vec_extractv4qiqi"
>   [(match_operand:QI 0 "register_operand")
>    (match_operand:V4QI 1 "register_operand")
>    (match_operand 2 "const_int_operand")]
>   "TARGET_SSE4_1"
> {
>   ix86_expand_vector_extract (false, operands[0],
> 			      operands[1], INTVAL (operands[2]));
>   DONE;
> })

We are missing vec_extractv2sisi or vec_extractv8qiv4qi, with -mno-mmx -mavx.
It seems we have addv2si3 available though.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Richard Biener from comment #6)
> We are missing vec_extractv2sisi or vec_extractv8qiv4qi, with -mno-mmx -mavx.
> It seems we have addv2si3 available though.

vec_extractv2sisi is available in mmx.md even with -mno-mmx:

(define_expand "vec_extractv2sisi"
  [(match_operand:SI 0 "register_operand")
   (match_operand:V2SI 1 "register_operand")
   (match_operand 2 "const_int_operand")]
  "TARGET_MMX || TARGET_MMX_WITH_SSE"
{
  ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
                              operands[1], INTVAL (operands[2]));
  DONE;
})

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[rguenther at suse dot de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #8 from rguenther at suse dot de <rguenther at suse dot de> ---
On Wed, 9 Feb 2022, ubizjak at gmail dot com wrote:

> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445
> 
> --- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
> (In reply to Richard Biener from comment #6)
> > We are missing vec_extractv2sisi or vec_extractv8qiv4qi, with -mno-mmx -mavx.
> > It seems we have addv2si3 available though.
> 
> vec_extractv2sisi is available in mmx.md even with -mno-mmx:
> 
> (define_expand "vec_extractv2sisi"
>   [(match_operand:SI 0 "register_operand")
>    (match_operand:V2SI 1 "register_operand")
>    (match_operand 2 "const_int_operand")]
>   "TARGET_MMX || TARGET_MMX_WITH_SSE"
> {
>   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
>                               operands[1], INTVAL (operands[2]));
>   DONE;
> })

But I think with -m32 we have !TARGET_MMX_WITH_SSE

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #9 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to rguenther@suse.de from comment #8)
> > (In reply to Richard Biener from comment #6)
> > > We are missing vec_extractv2sisi or vec_extractv8qiv4qi, with -mno-mmx -mavx.
> > > It seems we have addv2si3 available though.
> > 
> > vec_extractv2sisi is available in mmx.md even with -mno-mmx:
> > 
> > (define_expand "vec_extractv2sisi"
> >   [(match_operand:SI 0 "register_operand")
> >    (match_operand:V2SI 1 "register_operand")
> >    (match_operand 2 "const_int_operand")]
> >   "TARGET_MMX || TARGET_MMX_WITH_SSE"
> > {
> >   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
> >                               operands[1], INTVAL (operands[2]));
> >   DONE;
> > })
> 
> But I think with -m32 we have !TARGET_MMX_WITH_SSE

Yes, that is true. Please note that in this case, we don't have addv2si3 as
well as it also depends on TARGET_MMX_WITH_SSE.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #10 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #9)
> (In reply to rguenther@suse.de from comment #8)
> > > (In reply to Richard Biener from comment #6)
> > > > We are missing vec_extractv2sisi or vec_extractv8qiv4qi, with -mno-mmx -mavx.
> > > > It seems we have addv2si3 available though.
> > > 
> > > vec_extractv2sisi is available in mmx.md even with -mno-mmx:
> > > 
> > > (define_expand "vec_extractv2sisi"
> > >   [(match_operand:SI 0 "register_operand")
> > >    (match_operand:V2SI 1 "register_operand")
> > >    (match_operand 2 "const_int_operand")]
> > >   "TARGET_MMX || TARGET_MMX_WITH_SSE"
> > > {
> > >   ix86_expand_vector_extract (TARGET_MMX_WITH_SSE, operands[0],
> > >                               operands[1], INTVAL (operands[2]));
> > >   DONE;
> > > })
> > 
> > But I think with -m32 we have !TARGET_MMX_WITH_SSE
> 
> Yes, that is true. Please note that in this case, we don't have addv2si3 as
> well as it also depends on TARGET_MMX_WITH_SSE.

Oh, the testcase doesn't use add but xorv8qi3.  But since we're using
DImode for v8qi we of course do have support for it but also obviously
later will fail the vec_extract obtab queries ... a disi vec_extract
does not exist.

So it's the vectorizers fault to not properly account for scalar integer mode
vector types.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

--- Comment #11 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Biener <rguenth@gcc.gnu.org>:

https://gcc.gnu.org/g:da2bf62d9e2a25f2d6a99176144c250b51fbdee7

commit r12-7127-gda2bf62d9e2a25f2d6a99176144c250b51fbdee7
Author: Richard Biener <rguenther@suse.de>
Date:   Wed Feb 9 10:55:18 2022 +0100

    tree-optimization/104445 - check for vector extraction support

    This adds a missing check to epilogue reduction re-use, namely
    that we can do hi/lo extracts from the vector when demoting it
    to the epilogue vector size.

    I've chosen to add a can_vec_extract helper to optabs-query.h,
    in the future we might want to simplify the vectorizers life by
    handling vector-from-vector extraction via BIT_FIELD_REFs during
    RTL expansion via the mode punning when the vec_extract is not
    directly supported.

    I'm not 100% sure we can always do the punning of the
    vec_extract result to a vector mode of the same size, but then
    I'm also not sure how to check for that (the vectorizer doesn't
    in other places it does that at the moment, but I suppose we
    eventually just go through memory there)?

    2022-02-09  Richard Biener  <rguenther@suse.de>

            PR tree-optimization/104445
            PR tree-optimization/102832
            * optabs-query.h (can_vec_extract): New.
            * optabs-query.cc (can_vec_extract): Likewise.
            * tree-vect-loop.cc (vect_find_reusable_accumulator): Check
            we can extract a hi/lo part from the larger vector, rework
            check iteration from larger to smaller sizes.

            * gcc.dg/vect/pr104445.c: New testcase.

[Bug tree-optimization/104445] [12 Regression] ICE in vect_create_partial_epilog, at tree-vect-loop.cc:5098

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104445

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|ASSIGNED                    |RESOLVED

--- Comment #12 from Richard Biener <rguenth at gcc dot gnu.org> ---
Fixed.