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* [Bug target/105052] New: Incorrect constraint on SSSE3 split patterns with MMX operands
@ 2022-03-25 4:40 hjl.tools at gmail dot com
2022-03-26 14:16 ` [Bug target/105052] " cvs-commit at gcc dot gnu.org
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: hjl.tools at gmail dot com @ 2022-03-25 4:40 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105052
Bug ID: 105052
Summary: Incorrect constraint on SSSE3 split patterns with MMX
operands
Product: gcc
Version: 10.3.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: hjl.tools at gmail dot com
Target Milestone: ---
define_insn_and_split "ssse3_ph<plusminus_mnemonic>wv4hi3"
and
define_insn_and_split "ssse3_ph<plusminus_mnemonic>dv2si3"
have the Yv register constraint:
(define_register_constraint "Yv"
"TARGET_AVX512VL ? ALL_SSE_REGS : TARGET_SSE ? SSE_REGS : NO_REGS"
"@internal For AVX512VL, any EVEX encodable SSE register
(@code{%xmm0-%xmm31}), otherwise any SSE register.")
But these instructions aren't available with EVEX encoding. The x register
constraint should be used.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/105052] Incorrect constraint on SSSE3 split patterns with MMX operands
2022-03-25 4:40 [Bug target/105052] New: Incorrect constraint on SSSE3 split patterns with MMX operands hjl.tools at gmail dot com
@ 2022-03-26 14:16 ` cvs-commit at gcc dot gnu.org
2022-03-26 20:02 ` cvs-commit at gcc dot gnu.org
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2022-03-26 14:16 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105052
--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:
https://gcc.gnu.org/g:99591cf43fc1da0fb72b3da02ba937ba30bd2bf2
commit r12-7828-g99591cf43fc1da0fb72b3da02ba937ba30bd2bf2
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu Mar 24 21:41:12 2022 -0700
x86: Use x constraint on SSSE3 patterns with MMX operands
Since PHADDW/PHADDD/PHADDSW/PHSUBW/PHSUBD/PHSUBSW/PSIGNB/PSIGNW/PSIGND
have no AVX512 version, replace the "Yv" register constraint with the
"x" register constraint.
PR target/105052
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
Replace "Yv" with "x".
(ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
(ssse3_psign<mode>3): Likewise.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/105052] Incorrect constraint on SSSE3 split patterns with MMX operands
2022-03-25 4:40 [Bug target/105052] New: Incorrect constraint on SSSE3 split patterns with MMX operands hjl.tools at gmail dot com
2022-03-26 14:16 ` [Bug target/105052] " cvs-commit at gcc dot gnu.org
@ 2022-03-26 20:02 ` cvs-commit at gcc dot gnu.org
2022-03-26 20:03 ` cvs-commit at gcc dot gnu.org
2022-03-26 20:34 ` hjl.tools at gmail dot com
3 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2022-03-26 20:02 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105052
--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:
https://gcc.gnu.org/g:ee25401b10a1ca6157c0a02f49f47e7b253af123
commit r11-9694-gee25401b10a1ca6157c0a02f49f47e7b253af123
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu Mar 24 21:41:12 2022 -0700
x86: Use x constraint on SSSE3 patterns with MMX operands
Since PHADDW/PHADDD/PHADDSW/PHSUBW/PHSUBD/PHSUBSW/PSIGNB/PSIGNW/PSIGND
have no AVX512 version, replace the "Yv" register constraint with the
"x" register constraint.
PR target/105052
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
Replace "Yv" with "x".
(ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
(ssse3_psign<mode>3): Likewise.
(cherry picked from commit 99591cf43fc1da0fb72b3da02ba937ba30bd2bf2)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/105052] Incorrect constraint on SSSE3 split patterns with MMX operands
2022-03-25 4:40 [Bug target/105052] New: Incorrect constraint on SSSE3 split patterns with MMX operands hjl.tools at gmail dot com
2022-03-26 14:16 ` [Bug target/105052] " cvs-commit at gcc dot gnu.org
2022-03-26 20:02 ` cvs-commit at gcc dot gnu.org
@ 2022-03-26 20:03 ` cvs-commit at gcc dot gnu.org
2022-03-26 20:34 ` hjl.tools at gmail dot com
3 siblings, 0 replies; 5+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2022-03-26 20:03 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105052
--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:
https://gcc.gnu.org/g:40e7524ada2f09ec80d8083b9608a10ed516d8fe
commit r10-10514-g40e7524ada2f09ec80d8083b9608a10ed516d8fe
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Thu Mar 24 21:41:12 2022 -0700
x86: Use x constraint on SSSE3 patterns with MMX operands
Since PHADDW/PHADDD/PHADDSW/PHSUBW/PHSUBD/PHSUBSW/PSIGNB/PSIGNW/PSIGND
have no AVX512 version, replace the "Yv" register constraint with the
"x" register constraint.
PR target/105052
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>wv4hi3):
Replace "Yv" with "x".
(ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
(ssse3_psign<mode>3): Likewise.
(cherry picked from commit 99591cf43fc1da0fb72b3da02ba937ba30bd2bf2)
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/105052] Incorrect constraint on SSSE3 split patterns with MMX operands
2022-03-25 4:40 [Bug target/105052] New: Incorrect constraint on SSSE3 split patterns with MMX operands hjl.tools at gmail dot com
` (2 preceding siblings ...)
2022-03-26 20:03 ` cvs-commit at gcc dot gnu.org
@ 2022-03-26 20:34 ` hjl.tools at gmail dot com
3 siblings, 0 replies; 5+ messages in thread
From: hjl.tools at gmail dot com @ 2022-03-26 20:34 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105052
H.J. Lu <hjl.tools at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Target Milestone|--- |10.4
Resolution|--- |FIXED
--- Comment #4 from H.J. Lu <hjl.tools at gmail dot com> ---
Fixed GCC 12, GCC 11.3 and GCC 10.4.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2022-03-25 4:40 [Bug target/105052] New: Incorrect constraint on SSSE3 split patterns with MMX operands hjl.tools at gmail dot com
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