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* [Bug c/105172] New: RV64: gcc generates R_RISCV_ALIGN with a non-power-of-two value
@ 2022-04-06  3:27 rui314 at gmail dot com
  2022-04-06  5:28 ` [Bug target/105172] " pinskia at gcc dot gnu.org
  2022-04-15  6:39 ` rui314 at gmail dot com
  0 siblings, 2 replies; 3+ messages in thread
From: rui314 at gmail dot com @ 2022-04-06  3:27 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105172

            Bug ID: 105172
           Summary: RV64: gcc generates R_RISCV_ALIGN with a
                    non-power-of-two value
           Product: gcc
           Version: 11.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rui314 at gmail dot com
  Target Milestone: ---

It is reported against the mold linker
(https://github.com/rui314/mold/issues/419), but I believe it's GCC"s bug.

It looks like GCC sometimes create a R_RISCV_ALIGN relocation with a
non-power-of-two requirement alignment, as you can see in the above bug report.
That simply doesn't make sense and strongly suggests that something is not
working as intended in GCC. I believe all R_RISV_ALIGN relocations have a
power-of-two value.

^ permalink raw reply	[flat|nested] 3+ messages in thread
* [Bug target/105172] RV64: gcc generates R_RISCV_ALIGN with a non-power-of-two value
  2022-04-06  3:27 [Bug c/105172] New: RV64: gcc generates R_RISCV_ALIGN with a non-power-of-two value rui314 at gmail dot com
@ 2022-04-06  5:28 ` pinskia at gcc dot gnu.org
  2022-04-15  6:39 ` rui314 at gmail dot com
  1 sibling, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2022-04-06  5:28 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105172

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Are you sure this is not an assembler bug which then you should report to
binutils.

^ permalink raw reply	[flat|nested] 3+ messages in thread
* [Bug target/105172] RV64: gcc generates R_RISCV_ALIGN with a non-power-of-two value
  2022-04-06  3:27 [Bug c/105172] New: RV64: gcc generates R_RISCV_ALIGN with a non-power-of-two value rui314 at gmail dot com
  2022-04-06  5:28 ` [Bug target/105172] " pinskia at gcc dot gnu.org
@ 2022-04-15  6:39 ` rui314 at gmail dot com
  1 sibling, 0 replies; 3+ messages in thread
From: rui314 at gmail dot com @ 2022-04-15  6:39 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105172

Rui Ueyama <rui314 at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |INVALID

--- Comment #2 from Rui Ueyama <rui314 at gmail dot com> ---
I didn't understand the correct semantics of this type of relocation. Please
disregard this issue. Sorry for the noise.

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-04-15  6:39 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-06  3:27 [Bug c/105172] New: RV64: gcc generates R_RISCV_ALIGN with a non-power-of-two value rui314 at gmail dot com
2022-04-06  5:28 ` [Bug target/105172] " pinskia at gcc dot gnu.org
2022-04-15  6:39 ` rui314 at gmail dot com

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