[Bug c++/105731] New: superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[Bug c++/105731] New: superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[bugzilla@little-bat.de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

            Bug ID: 105731
           Summary: superfluous second operation before conditional branch
                      -O2 -mcpu=cortex-m0plus
           Product: gcc
           Version: og10 (devel/omp/gcc-10)
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: bugzilla@little-bat.de
  Target Milestone: ---

gcc 10.3.1 misses an easy oportunity for optimization:

Instruction:  
    if ((bits<<=1)>=0) goto p3;

generated code:
    strh    r7, [r0, #4]
    lsls    r3, r2, #1
    lsls    r2, r2, #1
    bpl     .L8

i believe the 2nd "lsls" is superfluous. 
It would save me 3MHz if it wasn't there. :-)

full example: 
    https://godbolt.org/z/xocbvjn5x

[Bug target/105731] superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[mpolacek at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

Marek Polacek <mpolacek at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Version|og10 (devel/omp/gcc-10)     |unknown
          Component|c++                         |target
                 CC|                            |mpolacek at gcc dot gnu.org

--- Comment #1 from Marek Polacek <mpolacek at gcc dot gnu.org> ---
Not a C++ FE problem.

[Bug target/105731] superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Created attachment 53032
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=53032&action=edit
testcase

[Bug target/105731] superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Combine:

Trying 41 -> 44:
   41: r120:SI=r119:SI<<0x1a
      REG_DEAD r119:SI
   44: pc={(r120:SI<0)?L114:pc}
      REG_BR_PROB 283038348
Failed to match this instruction:
(parallel [
        (set (pc)
            (if_then_else (ne (zero_extract:SI (reg:SI 119 [ _7 ])
                        (const_int 1 [0x1])
                        (const_int 5 [0x5]))
                    (const_int 0 [0]))
                (label_ref 114)
                (pc)))
        (set (reg/v:SI 120 [ bits ])
            (ashift:SI (reg:SI 119 [ _7 ])
                (const_int 26 [0x1a])))
    ])
Failed to match this instruction:
(parallel [
        (set (pc)
            (if_then_else (ne (zero_extract:SI (reg:SI 119 [ _7 ])
                        (const_int 1 [0x1])
                        (const_int 5 [0x5]))
                    (const_int 0 [0]))
                (label_ref 114)
                (pc)))
        (set (reg/v:SI 120 [ bits ])
            (ashift:SI (reg:SI 119 [ _7 ])
                (const_int 26 [0x1a])))
    ])
Failed to match this instruction:
(parallel [
        (set (pc)
            (if_then_else (ne (and:SI (lshiftrt:SI (reg:SI 119 [ _7 ])
                            (const_int 5 [0x5]))
                        (const_int 1 [0x1]))
                    (const_int 0 [0]))
                (label_ref 114)
                (pc)))
        (set (reg/v:SI 120 [ bits ])
            (ashift:SI (reg:SI 119 [ _7 ])
                (const_int 26 [0x1a])))
    ])
Failed to match this instruction:
(parallel [
        (set (pc)
            (if_then_else (ne (and:SI (lshiftrt:SI (reg:SI 119 [ _7 ])
                            (const_int 5 [0x5]))
                        (const_int 1 [0x1]))
                    (const_int 0 [0]))
                (label_ref 114)
                (pc)))
        (set (reg/v:SI 120 [ bits ])
            (ashift:SI (reg:SI 119 [ _7 ])
                (const_int 26 [0x1a])))
    ])
Successfully matched this instruction:
(set (reg/v:SI 120 [ bits ])
    (ashift:SI (reg:SI 119 [ _7 ])
        (const_int 26 [0x1a])))
Successfully matched this instruction:
(set (pc)
    (if_then_else (ne (zero_extract:SI (reg:SI 119 [ _7 ])
                (const_int 1 [0x1])
                (const_int 5 [0x5]))
            (const_int 0 [0]))
        (label_ref 114)
        (pc)))
allowing combination of insns 41 and 44
original costs 4 + 14 = 18
replacement costs 4 + 14 = 18
modifying insn i2    41: r120:SI=r119:SI<<0x1a
deferring rescan insn with uid = 41.
modifying insn i3    44:
{pc={(zero_extract(r119:SI,0x1,0x5)!=0)?L114:pc};clobber scratch;}
      REG_DEAD r119:SI
      REG_BR_PROB 283038348
deferring rescan insn with uid = 44.

The cost for the following instruction is wrong:
(jump_insn 113 110 114 13 (parallel [
            (set (pc)
                (if_then_else (eq (zero_extract:SI (reg:SI 119 [ _7 ])
                            (const_int 1 [0x1])
                            (const_int 5 [0x5]))
                        (const_int 0 [0]))
                    (label_ref 59)
                    (pc)))
            (clobber (scratch:SI))
        ]) "/app/example.cpp":33:26 961 {*tbit_cbranch}
     (expr_list:REG_DEAD (reg:SI 119 [ _7 ])
        (int_list:REG_BR_PROB 457091900 (nil)))
 -> 59)

It should be 18 since it gets splitted into two one which has a cost of 4 and
another which is a cost of 14.

[Bug target/105731] superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2022-05-25

--- Comment #4 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Confirmed.

[Bug target/105731] superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
The thumb1 rtx-costing function needs a complete rewrite along the lines and
style of the Thumb2 and Arm costing routines.
Another thing for my copious free time (TM).

[Bug target/105731] superfluous second operation before conditional branch -O2 -mcpu=cortex-m0plus

[bugzilla@little-bat.de]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105731

Kio <bugzilla@little-bat.de> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Version|10.3.1                      |11.2.1

--- Comment #6 from Kio <bugzilla@little-bat.de> ---
i just came across the test on godbolt again and found they added gcc 11.2.1.
compiled code no change. so i updated gcc version for the ticket.