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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/105778] Shift by register --- unnecessary AND instruction
Date: Mon, 30 May 2022 22:42:52 +0000 [thread overview]
Message-ID: <bug-105778-4-HOidFTptYp@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-105778-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105778
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I think:
--- gcc/config/i386/i386.md.jj 2022-05-30 14:07:11.988199636 +0200
+++ gcc/config/i386/i386.md 2022-05-31 00:39:08.031757037 +0200
@@ -12708,19 +12708,21 @@ (define_expand "<insn><mode>3"
""
"ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;")
+(define_mode_iterator SWI48A [SI (DI "TARGET_64BIT")])
+
;; Avoid useless masking of count operand.
-(define_insn_and_split "*<insn><mode>3_mask"
+(define_insn_and_split "*<insn><SWI48:mode>3_mask_<SWI48A:mode>"
[(set (match_operand:SWI48 0 "nonimmediate_operand")
(any_shiftrt:SWI48
(match_operand:SWI48 1 "nonimmediate_operand")
(subreg:QI
- (and:SI
- (match_operand:SI 2 "register_operand" "c,r")
- (match_operand:SI 3 "const_int_operand")) 0)))
+ (and:SWI48A
+ (match_operand:SWI48A 2 "register_operand" "c,r")
+ (match_operand:SWI48A 3 "const_int_operand")) 0)))
(clobber (reg:CC FLAGS_REG))]
- "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)
- && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1))
- == GET_MODE_BITSIZE (<MODE>mode)-1
+ "ix86_binary_operator_ok (<CODE>, <SWI48:MODE>mode, operands)
+ && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<SWI48:MODE>mode)-1))
+ == GET_MODE_BITSIZE (<SWI48:MODE>mode)-1
&& ix86_pre_reload_split ()"
"#"
"&& 1"
@@ -12754,16 +12756,16 @@ (define_insn_and_split "*<insn><mode>3_m
""
[(set_attr "isa" "*,bmi2")])
-(define_insn_and_split "*<insn><dwi>3_doubleword_mask"
- [(set (match_operand:<DWI> 0 "register_operand")
- (any_shiftrt:<DWI>
- (match_operand:<DWI> 1 "register_operand")
+(define_insn_and_split "*<insn><DWIH:dwi>3_doubleword_mask_<SWI48:mode>"
+ [(set (match_operand:<DWIH:DWI> 0 "register_operand")
+ (any_shiftrt:<DWIH:DWI>
+ (match_operand:<DWIH:DWI> 1 "register_operand")
(subreg:QI
- (and:SI
- (match_operand:SI 2 "register_operand" "c")
- (match_operand:SI 3 "const_int_operand")) 0)))
+ (and:SWI48
+ (match_operand:SWI48 2 "register_operand" "c")
+ (match_operand:SWI48 3 "const_int_operand")) 0)))
(clobber (reg:CC FLAGS_REG))]
- "(INTVAL (operands[3]) & (<MODE_SIZE> * BITS_PER_UNIT)) == 0
+ "(INTVAL (operands[3]) & (<DWIH:MODE_SIZE> * BITS_PER_UNIT)) == 0
&& ix86_pre_reload_split ()"
"#"
"&& 1"
@@ -12772,7 +12774,8 @@ (define_insn_and_split "*<insn><dwi>3_do
(ior:DWIH (lshiftrt:DWIH (match_dup 4)
(and:QI (match_dup 2) (match_dup 8)))
(subreg:DWIH
- (ashift:<DWI> (zero_extend:<DWI> (match_dup 7))
+ (ashift:<DWIH:DWI>
+ (zero_extend:<DWIH:DWI> (match_dup 7))
(minus:QI (match_dup 9)
(and:QI (match_dup 2) (match_dup 8)))) 0)))
(clobber (reg:CC FLAGS_REG))])
@@ -12781,13 +12784,14 @@ (define_insn_and_split "*<insn><dwi>3_do
(any_shiftrt:DWIH (match_dup 7) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])]
{
- split_double_mode (<DWI>mode, &operands[0], 2, &operands[4], &operands[6]);
+ split_double_mode (<DWIH:DWI>mode, &operands[0], 2, &operands[4],
+ &operands[6]);
- operands[8] = GEN_INT (<MODE_SIZE> * BITS_PER_UNIT - 1);
- operands[9] = GEN_INT (<MODE_SIZE> * BITS_PER_UNIT);
+ operands[8] = GEN_INT (<DWIH:MODE_SIZE> * BITS_PER_UNIT - 1);
+ operands[9] = GEN_INT (<DWIH:MODE_SIZE> * BITS_PER_UNIT);
- if ((INTVAL (operands[3]) & ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
- != ((<MODE_SIZE> * BITS_PER_UNIT) - 1))
+ if ((INTVAL (operands[3]) & ((<DWIH:MODE_SIZE> * BITS_PER_UNIT) - 1))
+ != ((<DWIH:MODE_SIZE> * BITS_PER_UNIT) - 1))
{
rtx tem = gen_reg_rtx (SImode);
emit_insn (gen_andsi3 (tem, operands[2], operands[3]));
could fix this. Wonder if it couldn't be written without the extra iterator
though...
next prev parent reply other threads:[~2022-05-30 22:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-30 21:21 [Bug target/105778] New: Rotate " zero at smallinteger dot com
2022-05-30 22:42 ` jakub at gcc dot gnu.org [this message]
2022-05-31 13:19 ` [Bug target/105778] Shift " jakub at gcc dot gnu.org
2022-05-31 13:44 ` ubizjak at gmail dot com
2022-05-31 13:50 ` jakub at gcc dot gnu.org
2022-05-31 14:41 ` jakub at gcc dot gnu.org
2022-05-31 18:53 ` ubizjak at gmail dot com
2022-06-02 8:41 ` cvs-commit at gcc dot gnu.org
2022-06-02 8:44 ` jakub at gcc dot gnu.org
2022-10-24 17:44 ` pinskia at gcc dot gnu.org
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