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From: "crazylht at gmail dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/107093] AVX512 mask operations not simplified in fully masked loop Date: Mon, 10 Oct 2022 01:50:05 +0000 [thread overview] Message-ID: <bug-107093-4-HnXaCYTfzE@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-107093-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107093 --- Comment #2 from Hongtao.liu <crazylht at gmail dot com> --- For UNSPEC part, we can create a new define_insn with genenral operation and accept both gpr and mask alternatives just like other logic patterns. For gpr version, we can split it to xor + not after reload. For mask version, we can split it to kxnor with UNSPEC after reload. It should help general simplication for xor and not.
next prev parent reply other threads:[~2022-10-10 1:50 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-09-30 9:06 [Bug target/107093] New: " rguenth at gcc dot gnu.org 2022-09-30 9:09 ` [Bug target/107093] " rguenth at gcc dot gnu.org 2022-10-10 1:50 ` crazylht at gmail dot com [this message] 2022-10-11 9:23 ` cvs-commit at gcc dot gnu.org 2022-10-11 10:05 ` crazylht at gmail dot com 2022-10-11 10:13 ` crazylht at gmail dot com 2022-10-11 10:51 ` rguenth at gcc dot gnu.org 2022-10-11 10:59 ` rguenth at gcc dot gnu.org 2022-10-11 11:08 ` crazylht at gmail dot com 2022-10-11 11:14 ` rguenther at suse dot de 2023-07-24 8:21 ` rguenth at gcc dot gnu.org
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