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* [Bug target/107757] New: PPCLE: Inefficient vector constant creation
@ 2022-11-19 7:22 jens.seifert at de dot ibm.com
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From: jens.seifert at de dot ibm.com @ 2022-11-19 7:22 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107757
Bug ID: 107757
Summary: PPCLE: Inefficient vector constant creation
Product: gcc
Version: 12.2.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: jens.seifert at de dot ibm.com
Target Milestone: ---
Due to the fact that vslw, vsld, vsrd, ... only use the modulo of bit width for
shifting, the combination with 0xFF..FF vector can be used to create vector
constants for:
vec_splats(-0.0) or vec_splats(1ULL << 31) and scalar -0.0
vec_splats(-0.0f) or vec_splats(1U << 31)
vec_splats((short)0x8000)
with only 2 2-cycle vector instructions.
Sample:
vector long long lsb64()
{
return vec_splats(1LL);
}
creates:
lsb64():
.LCF5:
addi 2,2,.TOC.-.LCF5@l
addis 9,2,.LC12@toc@ha
addi 9,9,.LC12@toc@l
lvx 2,0,9
blr
.long 0
.byte 0,9,0,0,0,0,0,0
while:
vector long long lsb64_opt()
{
vector long long a = vec_splats(~0LL);
__asm__("vsrd %0,%0,%0":"=v"(a):"v"(a),"v"(a));
return a;
}
creates:
lsb64_opt():
vspltisw 2,-1
vsrd 2,2,2
blr
.long 0
.byte 0,9,0,0,0,0,0,0
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2022-11-19 7:22 [Bug target/107757] New: PPCLE: Inefficient vector constant creation jens.seifert at de dot ibm.com
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